From patchwork Fri Mar 8 17:30:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1053629 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-497586-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="cyP9NEEU"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44GF094xGjz9sBp for ; Sat, 9 Mar 2019 04:30:59 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=B0jMPYU7gjTIuh0VCgemTwyX2JEvrrU+GN4WNbuPiY62Jfs2M/ EpnZUcyxNSYysV5d4Ay60kG3ySOZULTcYf2KIbFWPoTK3Ck/BEo87CpvKJ0InViJ 4pFZSaLm7Jvfj99rrPQ/C2/hD1/tcRqCqvdVnw+UlHnDPMp7dWtleKHYk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=Uc2TKWaR6lQdtJhFLnj4lZaWNjw=; b=cyP9NEEULV7FCRwo9LY+ g2PGbmFu5UHwTGVXInIGE9DWo29YlpKkD/kVANJrGhmIBrIaISL4BMsTHR7qXBHL 5YEMNAPmDdrdmyKebG/iH53ggCSSFWIDMFyYLhe/yMuAzKXIggrLKMaKOaKIsZaR kzmTFEg7751tTYP77o+/KRo= Received: (qmail 49064 invoked by alias); 8 Mar 2019 17:30:48 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 48988 invoked by uid 89); 8 Mar 2019 17:30:37 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LOTSOFHASH, SPF_PASS autolearn=ham version=3.3.1 spammy=availability, r269499 X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 08 Mar 2019 17:30:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E0A4DA78 for ; Fri, 8 Mar 2019 09:30:28 -0800 (PST) Received: from [10.2.207.62] (e107157-lin.cambridge.arm.com [10.2.207.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C6FB3F575 for ; Fri, 8 Mar 2019 09:30:28 -0800 (PST) To: gcc-patches@gcc.gnu.org From: "Andre Vieira (lists)" Subject: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions Message-ID: <7a5f471c-6302-1d94-f3f4-bafa2e843da1@arm.com> Date: Fri, 8 Mar 2019 17:30:26 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 X-IsSubscribed: yes Hi, vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs that do not support double precision. This patch fixes that. Regression tested for arm-none-eabi. Committed in r269499. Cheers, Andre gcc/ChangeLog: 2019-03-08 Andre Vieira * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE requirement. gcc/testsuite/ChangeLog: 2019-03-08 Andre Vieira * gcc.target/arm/f16_f64_conv_no_dp.c: New test. From 870d88c1d2cf9f1e11ab85b4048739c0c98e9a06 Mon Sep 17 00:00:00 2001 From: Andre Vieira Date: Fri, 8 Mar 2019 16:11:10 +0000 Subject: [PATCH] [GCC, Arm] Fix availability of FP16-FP64 conversion instructions vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs that do not support double precision. This patch fixes that. --- gcc/config/arm/arm.h | 2 +- gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 103d390dd17273e947bbd4d605be2c1ef70fb137..7adafead0f20832467b873f53d298a2e1a25ab0a 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -195,7 +195,7 @@ extern tree arm_fp16_type_node; /* FPU supports converting between HFmode and DFmode in a single hardware step. */ #define TARGET_FP16_TO_DOUBLE \ - (TARGET_HARD_FLOAT && (TARGET_FP16 && TARGET_VFP5)) + (TARGET_HARD_FLOAT && TARGET_FP16 && TARGET_VFP5 && TARGET_VFP_DOUBLE) /* FPU supports fused-multiply-add operations. */ #define TARGET_FMA (bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv4)) diff --git a/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c new file mode 100644 index 0000000000000000000000000000000000000000..99b62a8ffd5de5c61c08980a067d8fc08cb24b11 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-skip-if "do not override fpu" { *-*-* } { "-mfpu=*" } { "-mfpu=fpv5-sp-d16" } } */ +/* { dg-skip-if "do not disable fpu" { *-*-* } { "-mfloat-abi=soft" } { * } } */ +/* { dg-skip-if "do not override fp16-format" { *-*-* } { "-mfp16-format=*" } { "-mfp16-format=ieee" } } */ +/* { dg-options "-O1 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mfp16-format=ieee" } */ + +__fp16 foo (double a) +{ + return a; +} + +double bar (__fp16 a) +{ + return a; +} -- 2.17.1