| Message ID | 7281afac-431b-cf38-95d6-8c1fbc8afdce@foss.arm.com |
|---|---|
| State | New |
| Headers | show |
Hi Thomas, On 15 June 2017 at 18:18, Thomas Preudhomme <thomas.preudhomme@foss.arm.com> wrote: > Hi, > > Conditions checked for ARM targets in vector-related effective targets > are inconsistent: > > * sometimes arm*-*-* is checked > * sometimes Neon is checked > * sometimes arm_neon_ok and sometimes arm_neon is used for neon check > * sometimes check_effective_target_* is used, sometimes is-effective-target > > This patch consolidate all of these check into using is-effective-target > arm_neon and when little endian was checked, the check is kept. > > ChangeLog entry is as follows: > > *** gcc/testsuite/ChangeLog *** > > 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> > > * lib/target-supports.exp (check_effective_target_vect_int): Replace > current ARM check by ARM NEON's availability check. > (check_effective_target_vect_intfloat_cvt): Likewise. > (check_effective_target_vect_uintfloat_cvt): Likewise. > (check_effective_target_vect_floatint_cvt): Likewise. > (check_effective_target_vect_floatuint_cvt): Likewise. > (check_effective_target_vect_shift): Likewise. > (check_effective_target_whole_vector_shift): Likewise. > (check_effective_target_vect_bswap): Likewise. > (check_effective_target_vect_shift_char): Likewise. > (check_effective_target_vect_long): Likewise. > (check_effective_target_vect_float): Likewise. > (check_effective_target_vect_perm): Likewise. > (check_effective_target_vect_perm_byte): Likewise. > (check_effective_target_vect_perm_short): Likewise. > (check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise. > (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. > (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. > (check_effective_target_vect_widen_mult_hi_to_si): Likewise. > (check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise. > (check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise. > (check_effective_target_vect_widen_shift): Likewise. > (check_effective_target_vect_extract_even_odd): Likewise. > (check_effective_target_vect_interleave): Likewise. > (check_effective_target_vect_multiple_sizes): Likewise. > (check_effective_target_vect64): Likewise. > (check_effective_target_vect_max_reduc): Likewise. > > Testing: Testsuite shows no regression when targeting ARMv7-A with > -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with > default FPU and float ABI (soft). Testing was done with both compare_tests > and the updated dg-cmp-results proposed in > https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html > > Is this ok for trunk? > I applied your patch on top of r249233, and noticed quite a few changes: http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html Note that "Big-Regression" cases are caused by the fact that there a are PASS->XPASS and XFAILs disappear with your patch, and many (3000-4000) PASS disappear. In that intended? Thanks, Christophe > Best regards, > > Thomas > > On 13/06/17 20:22, Christophe Lyon wrote: >> >> Hi Thomas, >> >> On 13 June 2017 at 11:08, Thomas Preudhomme >> <thomas.preudhomme@foss.arm.com> wrote: >>> >>> Hi, >>> >>> Conditions checked for ARM targets in vector-related effective targets >>> are inconsistent: >>> >>> * sometimes arm*-*-* is checked >>> * sometimes Neon is checked >>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>> * sometimes check_effective_target_* is used, sometimes >>> is-effective-target >>> >>> This patch consolidate all of these check into using is-effective-target >>> arm_neon and when little endian was checked, the check is kept. >>> >>> ChangeLog entry is as follows: >>> >>> *** gcc/testsuite/ChangeLog *** >>> >>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>> >>> * lib/target-supports.exp (check_effective_target_vect_int): >>> Replace >>> current ARM check by ARM NEON's availability check. >>> (check_effective_target_vect_intfloat_cvt): Likewise. >>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>> (check_effective_target_vect_floatint_cvt): Likewise. >>> (check_effective_target_vect_floatuint_cvt): Likewise. >>> (check_effective_target_vect_shift): Likewise. >>> (check_effective_target_whole_vector_shift): Likewise. >>> (check_effective_target_vect_bswap): Likewise. >>> (check_effective_target_vect_shift_char): Likewise. >>> (check_effective_target_vect_long): Likewise. >>> (check_effective_target_vect_float): Likewise. >>> (check_effective_target_vect_perm): Likewise. >>> (check_effective_target_vect_perm_byte): Likewise. >>> (check_effective_target_vect_perm_short): Likewise. >>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_shift): Likewise. >>> (check_effective_target_vect_extract_even_odd): Likewise. >>> (check_effective_target_vect_interleave): Likewise. >>> (check_effective_target_vect_multiple_sizes): Likewise. >>> (check_effective_target_vect64): Likewise. >>> (check_effective_target_vect_max_reduc): Likewise. >>> >>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>> default FPU and float ABI (soft). >>> >> >> That's strange, my testing detects a syntax error: >> >> Executed from: gcc.dg/vect/vect.exp >> gcc.dg/vect/slp-9.c: error executing dg-final: unbalanced close paren >> >> See >> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249142-consistent_neon_check/report-build-info.html >> for a full picture. >> >> Note that the cells with "BETTER" seem to be mostly several PASSes >> becoming unsupported. >> >> Thanks, >> >> Christophe >> >>> Is this ok for trunk? >>> >>> Best regards, >>> >>> Thomas
On 19/06/17 08:41, Christophe Lyon wrote: > Hi Thomas, > > > On 15 June 2017 at 18:18, Thomas Preudhomme > <thomas.preudhomme@foss.arm.com> wrote: >> Hi, >> >> Conditions checked for ARM targets in vector-related effective targets >> are inconsistent: >> >> * sometimes arm*-*-* is checked >> * sometimes Neon is checked >> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >> * sometimes check_effective_target_* is used, sometimes is-effective-target >> >> This patch consolidate all of these check into using is-effective-target >> arm_neon and when little endian was checked, the check is kept. >> >> ChangeLog entry is as follows: >> >> *** gcc/testsuite/ChangeLog *** >> >> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >> >> * lib/target-supports.exp (check_effective_target_vect_int): Replace >> current ARM check by ARM NEON's availability check. >> (check_effective_target_vect_intfloat_cvt): Likewise. >> (check_effective_target_vect_uintfloat_cvt): Likewise. >> (check_effective_target_vect_floatint_cvt): Likewise. >> (check_effective_target_vect_floatuint_cvt): Likewise. >> (check_effective_target_vect_shift): Likewise. >> (check_effective_target_whole_vector_shift): Likewise. >> (check_effective_target_vect_bswap): Likewise. >> (check_effective_target_vect_shift_char): Likewise. >> (check_effective_target_vect_long): Likewise. >> (check_effective_target_vect_float): Likewise. >> (check_effective_target_vect_perm): Likewise. >> (check_effective_target_vect_perm_byte): Likewise. >> (check_effective_target_vect_perm_short): Likewise. >> (check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise. >> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise. >> (check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise. >> (check_effective_target_vect_widen_shift): Likewise. >> (check_effective_target_vect_extract_even_odd): Likewise. >> (check_effective_target_vect_interleave): Likewise. >> (check_effective_target_vect_multiple_sizes): Likewise. >> (check_effective_target_vect64): Likewise. >> (check_effective_target_vect_max_reduc): Likewise. >> >> Testing: Testsuite shows no regression when targeting ARMv7-A with >> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >> default FPU and float ABI (soft). Testing was done with both compare_tests >> and the updated dg-cmp-results proposed in >> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >> >> Is this ok for trunk? >> > > I applied your patch on top of r249233, and noticed quite a few changes: > http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html > > Note that "Big-Regression" cases are caused by the fact that there a > are PASS->XPASS and XFAILs disappear with your patch, and many > (3000-4000) PASS disappear. > In that intended? It certainly is not. I'd like to investigate this but the link to results for rev 249233 is broken. Could you provide me with the results you have for that so that I can compare manually? Best regards, Thomas
On 19 June 2017 at 11:16, Thomas Preudhomme <thomas.preudhomme@foss.arm.com> wrote: > > > On 19/06/17 08:41, Christophe Lyon wrote: >> >> Hi Thomas, >> >> >> On 15 June 2017 at 18:18, Thomas Preudhomme >> <thomas.preudhomme@foss.arm.com> wrote: >>> >>> Hi, >>> >>> Conditions checked for ARM targets in vector-related effective targets >>> are inconsistent: >>> >>> * sometimes arm*-*-* is checked >>> * sometimes Neon is checked >>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>> * sometimes check_effective_target_* is used, sometimes >>> is-effective-target >>> >>> This patch consolidate all of these check into using is-effective-target >>> arm_neon and when little endian was checked, the check is kept. >>> >>> ChangeLog entry is as follows: >>> >>> *** gcc/testsuite/ChangeLog *** >>> >>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>> >>> * lib/target-supports.exp (check_effective_target_vect_int): >>> Replace >>> current ARM check by ARM NEON's availability check. >>> (check_effective_target_vect_intfloat_cvt): Likewise. >>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>> (check_effective_target_vect_floatint_cvt): Likewise. >>> (check_effective_target_vect_floatuint_cvt): Likewise. >>> (check_effective_target_vect_shift): Likewise. >>> (check_effective_target_whole_vector_shift): Likewise. >>> (check_effective_target_vect_bswap): Likewise. >>> (check_effective_target_vect_shift_char): Likewise. >>> (check_effective_target_vect_long): Likewise. >>> (check_effective_target_vect_float): Likewise. >>> (check_effective_target_vect_perm): Likewise. >>> (check_effective_target_vect_perm_byte): Likewise. >>> (check_effective_target_vect_perm_short): Likewise. >>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): >>> Likewise. >>> (check_effective_target_vect_widen_shift): Likewise. >>> (check_effective_target_vect_extract_even_odd): Likewise. >>> (check_effective_target_vect_interleave): Likewise. >>> (check_effective_target_vect_multiple_sizes): Likewise. >>> (check_effective_target_vect64): Likewise. >>> (check_effective_target_vect_max_reduc): Likewise. >>> >>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>> default FPU and float ABI (soft). Testing was done with both >>> compare_tests >>> and the updated dg-cmp-results proposed in >>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >>> >>> Is this ok for trunk? >>> >> >> I applied your patch on top of r249233, and noticed quite a few changes: >> >> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html >> >> Note that "Big-Regression" cases are caused by the fact that there a >> are PASS->XPASS and XFAILs disappear with your patch, and many >> (3000-4000) PASS disappear. >> In that intended? > > > It certainly is not. I'd like to investigate this but the link to results > for rev 249233 is broken. Could you provide me with the results you have for > that so that I can compare manually? > The results for 249233 are here: http://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/249233/ (reminder, I'm using dejagnu-1.6+, thus pre-pending multilib flags rather than appending) Thanks, Christophe > Best regards, > > Thomas
On 19/06/17 10:16, Thomas Preudhomme wrote: > > > On 19/06/17 08:41, Christophe Lyon wrote: >> Hi Thomas, >> >> >> On 15 June 2017 at 18:18, Thomas Preudhomme >> <thomas.preudhomme@foss.arm.com> wrote: >>> Hi, >>> >>> Conditions checked for ARM targets in vector-related effective targets >>> are inconsistent: >>> >>> * sometimes arm*-*-* is checked >>> * sometimes Neon is checked >>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>> * sometimes check_effective_target_* is used, sometimes is-effective-target >>> >>> This patch consolidate all of these check into using is-effective-target >>> arm_neon and when little endian was checked, the check is kept. >>> >>> ChangeLog entry is as follows: >>> >>> *** gcc/testsuite/ChangeLog *** >>> >>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>> >>> * lib/target-supports.exp (check_effective_target_vect_int): Replace >>> current ARM check by ARM NEON's availability check. >>> (check_effective_target_vect_intfloat_cvt): Likewise. >>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>> (check_effective_target_vect_floatint_cvt): Likewise. >>> (check_effective_target_vect_floatuint_cvt): Likewise. >>> (check_effective_target_vect_shift): Likewise. >>> (check_effective_target_whole_vector_shift): Likewise. >>> (check_effective_target_vect_bswap): Likewise. >>> (check_effective_target_vect_shift_char): Likewise. >>> (check_effective_target_vect_long): Likewise. >>> (check_effective_target_vect_float): Likewise. >>> (check_effective_target_vect_perm): Likewise. >>> (check_effective_target_vect_perm_byte): Likewise. >>> (check_effective_target_vect_perm_short): Likewise. >>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise. >>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise. >>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise. >>> (check_effective_target_vect_widen_shift): Likewise. >>> (check_effective_target_vect_extract_even_odd): Likewise. >>> (check_effective_target_vect_interleave): Likewise. >>> (check_effective_target_vect_multiple_sizes): Likewise. >>> (check_effective_target_vect64): Likewise. >>> (check_effective_target_vect_max_reduc): Likewise. >>> >>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>> default FPU and float ABI (soft). Testing was done with both compare_tests >>> and the updated dg-cmp-results proposed in >>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >>> >>> Is this ok for trunk? >>> >> >> I applied your patch on top of r249233, and noticed quite a few changes: >> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html >> >> >> Note that "Big-Regression" cases are caused by the fact that there a >> are PASS->XPASS and XFAILs disappear with your patch, and many >> (3000-4000) PASS disappear. >> In that intended? > > It certainly is not. I'd like to investigate this but the link to results for > rev 249233 is broken. Could you provide me with the results you have for that so > that I can compare manually? Actually yes it is, at least for the configurations with default (which still uses -mfpu=vfp in r249233) or VFP (whatever version) FPU. I've checked all the ->NA and ->UNSUPPORTED for the arm-none-linux-gnueabi configuration and none of them has a dg directive to select the neon unit (such as dg-additional-options <something that would add -mfpu on the command line>). I've also looked at arm-none-linux-gnueabihf configuration with neon FPU and there is no regression there. I therefore think this is all normal and expected. Note that under current trunk this should be different because neon-fp16 would be selected instead of vfp for default FPU with Cortex-A9. Best regards, Thomas
On 19 June 2017 at 16:11, Thomas Preudhomme <thomas.preudhomme@foss.arm.com> wrote: > > > On 19/06/17 10:16, Thomas Preudhomme wrote: >> >> >> >> On 19/06/17 08:41, Christophe Lyon wrote: >>> >>> Hi Thomas, >>> >>> >>> On 15 June 2017 at 18:18, Thomas Preudhomme >>> <thomas.preudhomme@foss.arm.com> wrote: >>>> >>>> Hi, >>>> >>>> Conditions checked for ARM targets in vector-related effective targets >>>> are inconsistent: >>>> >>>> * sometimes arm*-*-* is checked >>>> * sometimes Neon is checked >>>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>>> * sometimes check_effective_target_* is used, sometimes >>>> is-effective-target >>>> >>>> This patch consolidate all of these check into using is-effective-target >>>> arm_neon and when little endian was checked, the check is kept. >>>> >>>> ChangeLog entry is as follows: >>>> >>>> *** gcc/testsuite/ChangeLog *** >>>> >>>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>>> >>>> * lib/target-supports.exp (check_effective_target_vect_int): >>>> Replace >>>> current ARM check by ARM NEON's availability check. >>>> (check_effective_target_vect_intfloat_cvt): Likewise. >>>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>>> (check_effective_target_vect_floatint_cvt): Likewise. >>>> (check_effective_target_vect_floatuint_cvt): Likewise. >>>> (check_effective_target_vect_shift): Likewise. >>>> (check_effective_target_whole_vector_shift): Likewise. >>>> (check_effective_target_vect_bswap): Likewise. >>>> (check_effective_target_vect_shift_char): Likewise. >>>> (check_effective_target_vect_long): Likewise. >>>> (check_effective_target_vect_float): Likewise. >>>> (check_effective_target_vect_perm): Likewise. >>>> (check_effective_target_vect_perm_byte): Likewise. >>>> (check_effective_target_vect_perm_short): Likewise. >>>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): >>>> Likewise. >>>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): >>>> Likewise. >>>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): >>>> Likewise. >>>> (check_effective_target_vect_widen_shift): Likewise. >>>> (check_effective_target_vect_extract_even_odd): Likewise. >>>> (check_effective_target_vect_interleave): Likewise. >>>> (check_effective_target_vect_multiple_sizes): Likewise. >>>> (check_effective_target_vect64): Likewise. >>>> (check_effective_target_vect_max_reduc): Likewise. >>>> >>>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>>> default FPU and float ABI (soft). Testing was done with both >>>> compare_tests >>>> and the updated dg-cmp-results proposed in >>>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >>>> >>>> Is this ok for trunk? >>>> >>> >>> I applied your patch on top of r249233, and noticed quite a few changes: >>> >>> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html >>> >>> >>> Note that "Big-Regression" cases are caused by the fact that there a >>> are PASS->XPASS and XFAILs disappear with your patch, and many >>> (3000-4000) PASS disappear. >>> In that intended? >> >> >> It certainly is not. I'd like to investigate this but the link to results >> for >> rev 249233 is broken. Could you provide me with the results you have for >> that so >> that I can compare manually? > > > Actually yes it is, at least for the configurations with default (which > still uses -mfpu=vfp in r249233) or VFP (whatever version) FPU. I've checked > all the ->NA and ->UNSUPPORTED for the arm-none-linux-gnueabi configuration > and none of them has a dg directive to select the neon unit (such as > dg-additional-options <something that would add -mfpu on the command line>). > I've also looked at arm-none-linux-gnueabihf configuration with neon FPU and > there is no regression there. > > I therefore think this is all normal and expected. Note that under current > trunk this should be different because neon-fp16 would be selected instead > of vfp for default FPU with Cortex-A9. > OK, thanks for checking. So the version you sent on June 15th is OK? I can start a validation against current trunk, after Richard's series, it probably makes sense, doesn't it? Thanks, Christophe > Best regards, > > Thomas
On 19/06/17 15:31, Christophe Lyon wrote: > On 19 June 2017 at 16:11, Thomas Preudhomme > <thomas.preudhomme@foss.arm.com> wrote: >> >> >> On 19/06/17 10:16, Thomas Preudhomme wrote: >>> >>> >>> >>> On 19/06/17 08:41, Christophe Lyon wrote: >>>> >>>> Hi Thomas, >>>> >>>> >>>> On 15 June 2017 at 18:18, Thomas Preudhomme >>>> <thomas.preudhomme@foss.arm.com> wrote: >>>>> >>>>> Hi, >>>>> >>>>> Conditions checked for ARM targets in vector-related effective targets >>>>> are inconsistent: >>>>> >>>>> * sometimes arm*-*-* is checked >>>>> * sometimes Neon is checked >>>>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>>>> * sometimes check_effective_target_* is used, sometimes >>>>> is-effective-target >>>>> >>>>> This patch consolidate all of these check into using is-effective-target >>>>> arm_neon and when little endian was checked, the check is kept. >>>>> >>>>> ChangeLog entry is as follows: >>>>> >>>>> *** gcc/testsuite/ChangeLog *** >>>>> >>>>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>>>> >>>>> * lib/target-supports.exp (check_effective_target_vect_int): >>>>> Replace >>>>> current ARM check by ARM NEON's availability check. >>>>> (check_effective_target_vect_intfloat_cvt): Likewise. >>>>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>>>> (check_effective_target_vect_floatint_cvt): Likewise. >>>>> (check_effective_target_vect_floatuint_cvt): Likewise. >>>>> (check_effective_target_vect_shift): Likewise. >>>>> (check_effective_target_whole_vector_shift): Likewise. >>>>> (check_effective_target_vect_bswap): Likewise. >>>>> (check_effective_target_vect_shift_char): Likewise. >>>>> (check_effective_target_vect_long): Likewise. >>>>> (check_effective_target_vect_float): Likewise. >>>>> (check_effective_target_vect_perm): Likewise. >>>>> (check_effective_target_vect_perm_byte): Likewise. >>>>> (check_effective_target_vect_perm_short): Likewise. >>>>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): >>>>> Likewise. >>>>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>>>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>>>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>>>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): >>>>> Likewise. >>>>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): >>>>> Likewise. >>>>> (check_effective_target_vect_widen_shift): Likewise. >>>>> (check_effective_target_vect_extract_even_odd): Likewise. >>>>> (check_effective_target_vect_interleave): Likewise. >>>>> (check_effective_target_vect_multiple_sizes): Likewise. >>>>> (check_effective_target_vect64): Likewise. >>>>> (check_effective_target_vect_max_reduc): Likewise. >>>>> >>>>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>>>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>>>> default FPU and float ABI (soft). Testing was done with both >>>>> compare_tests >>>>> and the updated dg-cmp-results proposed in >>>>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >>>>> >>>>> Is this ok for trunk? >>>>> >>>> >>>> I applied your patch on top of r249233, and noticed quite a few changes: >>>> >>>> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html >>>> >>>> >>>> Note that "Big-Regression" cases are caused by the fact that there a >>>> are PASS->XPASS and XFAILs disappear with your patch, and many >>>> (3000-4000) PASS disappear. >>>> In that intended? >>> >>> >>> It certainly is not. I'd like to investigate this but the link to results >>> for >>> rev 249233 is broken. Could you provide me with the results you have for >>> that so >>> that I can compare manually? >> >> >> Actually yes it is, at least for the configurations with default (which >> still uses -mfpu=vfp in r249233) or VFP (whatever version) FPU. I've checked >> all the ->NA and ->UNSUPPORTED for the arm-none-linux-gnueabi configuration >> and none of them has a dg directive to select the neon unit (such as >> dg-additional-options <something that would add -mfpu on the command line>). >> I've also looked at arm-none-linux-gnueabihf configuration with neon FPU and >> there is no regression there. >> >> I therefore think this is all normal and expected. Note that under current >> trunk this should be different because neon-fp16 would be selected instead >> of vfp for default FPU with Cortex-A9. >> > > OK, thanks for checking. So the version you sent on June 15th is OK? Yes. > I can start a validation against current trunk, after Richard's series, > it probably makes sense, doesn't it? I think it'll give cleaner results yes. Note that the one with an explicit -mfpu=vfp* without neon will still have a lot of changes but at least the one with default FPU should be more readable. > > Thanks, > > Christophe > >> Best regards, >> >> Thomas
On 19 June 2017 at 16:47, Thomas Preudhomme <thomas.preudhomme@foss.arm.com> wrote: > > > On 19/06/17 15:31, Christophe Lyon wrote: >> >> On 19 June 2017 at 16:11, Thomas Preudhomme >> <thomas.preudhomme@foss.arm.com> wrote: >>> >>> >>> >>> On 19/06/17 10:16, Thomas Preudhomme wrote: >>>> >>>> >>>> >>>> >>>> On 19/06/17 08:41, Christophe Lyon wrote: >>>>> >>>>> >>>>> Hi Thomas, >>>>> >>>>> >>>>> On 15 June 2017 at 18:18, Thomas Preudhomme >>>>> <thomas.preudhomme@foss.arm.com> wrote: >>>>>> >>>>>> >>>>>> Hi, >>>>>> >>>>>> Conditions checked for ARM targets in vector-related effective targets >>>>>> are inconsistent: >>>>>> >>>>>> * sometimes arm*-*-* is checked >>>>>> * sometimes Neon is checked >>>>>> * sometimes arm_neon_ok and sometimes arm_neon is used for neon check >>>>>> * sometimes check_effective_target_* is used, sometimes >>>>>> is-effective-target >>>>>> >>>>>> This patch consolidate all of these check into using >>>>>> is-effective-target >>>>>> arm_neon and when little endian was checked, the check is kept. >>>>>> >>>>>> ChangeLog entry is as follows: >>>>>> >>>>>> *** gcc/testsuite/ChangeLog *** >>>>>> >>>>>> 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> >>>>>> >>>>>> * lib/target-supports.exp (check_effective_target_vect_int): >>>>>> Replace >>>>>> current ARM check by ARM NEON's availability check. >>>>>> (check_effective_target_vect_intfloat_cvt): Likewise. >>>>>> (check_effective_target_vect_uintfloat_cvt): Likewise. >>>>>> (check_effective_target_vect_floatint_cvt): Likewise. >>>>>> (check_effective_target_vect_floatuint_cvt): Likewise. >>>>>> (check_effective_target_vect_shift): Likewise. >>>>>> (check_effective_target_whole_vector_shift): Likewise. >>>>>> (check_effective_target_vect_bswap): Likewise. >>>>>> (check_effective_target_vect_shift_char): Likewise. >>>>>> (check_effective_target_vect_long): Likewise. >>>>>> (check_effective_target_vect_float): Likewise. >>>>>> (check_effective_target_vect_perm): Likewise. >>>>>> (check_effective_target_vect_perm_byte): Likewise. >>>>>> (check_effective_target_vect_perm_short): Likewise. >>>>>> (check_effective_target_vect_widen_sum_hi_to_si_pattern): >>>>>> Likewise. >>>>>> (check_effective_target_vect_widen_sum_qi_to_hi): Likewise. >>>>>> (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. >>>>>> (check_effective_target_vect_widen_mult_hi_to_si): Likewise. >>>>>> (check_effective_target_vect_widen_mult_qi_to_hi_pattern): >>>>>> Likewise. >>>>>> (check_effective_target_vect_widen_mult_hi_to_si_pattern): >>>>>> Likewise. >>>>>> (check_effective_target_vect_widen_shift): Likewise. >>>>>> (check_effective_target_vect_extract_even_odd): Likewise. >>>>>> (check_effective_target_vect_interleave): Likewise. >>>>>> (check_effective_target_vect_multiple_sizes): Likewise. >>>>>> (check_effective_target_vect64): Likewise. >>>>>> (check_effective_target_vect_max_reduc): Likewise. >>>>>> >>>>>> Testing: Testsuite shows no regression when targeting ARMv7-A with >>>>>> -mfpu=neon-fpv4 and -mfloat-abi=hard or when targeting Cortex-M3 with >>>>>> default FPU and float ABI (soft). Testing was done with both >>>>>> compare_tests >>>>>> and the updated dg-cmp-results proposed in >>>>>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01030.html >>>>>> >>>>>> Is this ok for trunk? >>>>>> >>>>> >>>>> I applied your patch on top of r249233, and noticed quite a few >>>>> changes: >>>>> >>>>> >>>>> http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249233-consistent_neon_check.patch/report-build-info.html >>>>> >>>>> >>>>> Note that "Big-Regression" cases are caused by the fact that there a >>>>> are PASS->XPASS and XFAILs disappear with your patch, and many >>>>> (3000-4000) PASS disappear. >>>>> In that intended? >>>> >>>> >>>> >>>> It certainly is not. I'd like to investigate this but the link to >>>> results >>>> for >>>> rev 249233 is broken. Could you provide me with the results you have for >>>> that so >>>> that I can compare manually? >>> >>> >>> >>> Actually yes it is, at least for the configurations with default (which >>> still uses -mfpu=vfp in r249233) or VFP (whatever version) FPU. I've >>> checked >>> all the ->NA and ->UNSUPPORTED for the arm-none-linux-gnueabi >>> configuration >>> and none of them has a dg directive to select the neon unit (such as >>> dg-additional-options <something that would add -mfpu on the command >>> line>). >>> I've also looked at arm-none-linux-gnueabihf configuration with neon FPU >>> and >>> there is no regression there. >>> >>> I therefore think this is all normal and expected. Note that under >>> current >>> trunk this should be different because neon-fp16 would be selected >>> instead >>> of vfp for default FPU with Cortex-A9. >>> >> >> OK, thanks for checking. So the version you sent on June 15th is OK? > > > Yes. > >> I can start a validation against current trunk, after Richard's series, >> it probably makes sense, doesn't it? > > > I think it'll give cleaner results yes. Note that the one with an explicit > -mfpu=vfp* without neon will still have a lot of changes but at least the > one with default FPU should be more readable. > The results with a more recent trunk (r249356)) are here: http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/249356-consistent_neon_check.patch/report-build-info.html They are slightly different, but still tedious to check ;-) >> >> Thanks, >> >> Christophe >> >>> Best regards, >>> >>> Thomas
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index ded6383cc1f9a1489cd83e1dace0c2fc48e252c3..aa8550c9d2cf0ae7e157d9c67fa06ad811651421 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2916,7 +2916,7 @@ proc check_effective_target_vect_int { } { || [istarget alpha*-*-*] || [istarget ia64-*-*] || [istarget aarch64*-*-*] - || [check_effective_target_arm32] + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && ([et-is-effective-target mips_loongson] || [et-is-effective-target mips_msa])) } { @@ -2944,8 +2944,7 @@ proc check_effective_target_vect_intfloat_cvt { } { if { [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_intfloat_cvt_saved($et_index) 1 @@ -2987,8 +2986,7 @@ proc check_effective_target_vect_uintfloat_cvt { } { || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) || [istarget aarch64*-*-*] - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_uintfloat_cvt_saved($et_index) 1 @@ -3016,8 +3014,7 @@ proc check_effective_target_vect_floatint_cvt { } { if { [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_floatint_cvt_saved($et_index) 1 @@ -3043,8 +3040,7 @@ proc check_effective_target_vect_floatuint_cvt { } { set et_vect_floatuint_cvt_saved($et_index) 0 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_floatuint_cvt_saved($et_index) 1 @@ -4903,7 +4899,7 @@ proc check_effective_target_vect_shift { } { || [istarget ia64-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget aarch64*-*-*] - || [check_effective_target_arm32] + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && ([et-is-effective-target mips_msa] || [et-is-effective-target mips_loongson])) } { @@ -4921,7 +4917,7 @@ proc check_effective_target_whole_vector_shift { } { || [istarget ia64-*-*] || [istarget aarch64*-*-*] || [istarget powerpc64*-*-*] - || ([check_effective_target_arm32] + || ([is-effective-target arm_neon] && [check_effective_target_arm_little_endian]) || ([istarget mips*-*-*] && [et-is-effective-target mips_loongson]) } { @@ -4945,8 +4941,7 @@ proc check_effective_target_vect_bswap { } { } else { set et_vect_bswap_saved($et_index) 0 if { [istarget aarch64*-*-*] - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon]) + || [is-effective-target arm_neon] } { set et_vect_bswap_saved($et_index) 1 } @@ -4969,7 +4964,7 @@ proc check_effective_target_vect_shift_char { } { set et_vect_shift_char_saved($et_index) 0 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [check_effective_target_arm32] + || [is-effective-target arm_neon] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_shift_char_saved($et_index) 1 @@ -4987,10 +4982,10 @@ proc check_effective_target_vect_shift_char { } { proc check_effective_target_vect_long { } { if { [istarget i?86-*-*] || [istarget x86_64-*-*] - || (([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) + || (([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) && [check_effective_target_ilp32]) - || [check_effective_target_arm32] + || [is-effective-target arm_neon] || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) || [istarget aarch64*-*-*] || ([istarget mips*-*-*] @@ -5025,7 +5020,7 @@ proc check_effective_target_vect_float { } { || [istarget aarch64*-*-*] || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) - || [check_effective_target_arm32] } { + || [is-effective-target arm_neon] } { set et_vect_float_saved($et_index) 1 } } @@ -5174,7 +5169,7 @@ proc check_effective_target_vect_perm { } { verbose "check_effective_target_vect_perm: using cached result" 2 } else { set et_vect_perm_saved($et_index) 0 - if { [is-effective-target arm_neon_ok] + if { [is-effective-target arm_neon] || [istarget aarch64*-*-*] || [istarget powerpc*-*-*] || [istarget spu-*-*] @@ -5203,7 +5198,7 @@ proc check_effective_target_vect_perm_byte { } { verbose "check_effective_target_vect_perm_byte: using cached result" 2 } else { set et_vect_perm_byte_saved($et_index) 0 - if { ([is-effective-target arm_neon_ok] + if { ([is-effective-target arm_neon] && [is-effective-target arm_little_endian]) || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) @@ -5232,7 +5227,7 @@ proc check_effective_target_vect_perm_short { } { verbose "check_effective_target_vect_perm_short: using cached result" 2 } else { set et_vect_perm_short_saved($et_index) 0 - if { ([is-effective-target arm_neon_ok] + if { ([is-effective-target arm_neon] && [is-effective-target arm_little_endian]) || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) @@ -5264,8 +5259,7 @@ proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } { set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0 if { [istarget powerpc*-*-*] || [istarget aarch64*-*-*] - || ([istarget arm*-*-*] && - [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || [istarget ia64-*-*] } { set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1 } @@ -5319,7 +5313,7 @@ proc check_effective_target_vect_widen_sum_qi_to_hi { } { } else { set et_vect_widen_sum_qi_to_hi_saved($et_index) 0 if { [check_effective_target_vect_unpack] - || [check_effective_target_arm_neon_ok] + || [is-effective-target arm_neon] || [istarget ia64-*-*] } { set et_vect_widen_sum_qi_to_hi_saved($et_index) 1 } @@ -5377,7 +5371,7 @@ proc check_effective_target_vect_widen_mult_qi_to_hi { } { } if { [istarget powerpc*-*-*] || [istarget aarch64*-*-*] - || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { + || [is-effective-target arm_neon] } { set et_vect_widen_mult_qi_to_hi_saved($et_index) 1 } } @@ -5414,8 +5408,7 @@ proc check_effective_target_vect_widen_mult_hi_to_si { } { || [istarget ia64-*-*] || [istarget aarch64*-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok]) } { + || [is-effective-target arm_neon] } { set et_vect_widen_mult_hi_to_si_saved($et_index) 1 } } @@ -5439,8 +5432,7 @@ proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } { } else { set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0 if { [istarget powerpc*-*-*] - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok] + || ([is-effective-target arm_neon] && [check_effective_target_arm_little_endian]) } { set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1 } @@ -5468,8 +5460,7 @@ proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } { || [istarget spu-*-*] || [istarget ia64-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] - || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok] + || ([is-effective-target arm_neon] && [check_effective_target_arm_little_endian]) } { set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1 } @@ -5516,7 +5507,7 @@ proc check_effective_target_vect_widen_shift { } { verbose "check_effective_target_vect_widen_shift: using cached result" 2 } else { set et_vect_widen_shift_saved($et_index) 0 - if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { + if { [is-effective-target arm_neon] } { set et_vect_widen_shift_saved($et_index) 1 } } @@ -6070,7 +6061,7 @@ proc check_effective_target_vect_extract_even_odd { } { set et_vect_extract_even_odd_saved($et_index) 0 if { [istarget aarch64*-*-*] || [istarget powerpc*-*-*] - || [is-effective-target arm_neon_ok] + || [is-effective-target arm_neon] || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget ia64-*-*] || [istarget spu-*-*] @@ -6098,7 +6089,7 @@ proc check_effective_target_vect_interleave { } { set et_vect_interleave_saved($et_index) 0 if { [istarget aarch64*-*-*] || [istarget powerpc*-*-*] - || [is-effective-target arm_neon_ok] + || [is-effective-target arm_neon] || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget ia64-*-*] || [istarget spu-*-*] @@ -6152,7 +6143,7 @@ proc check_effective_target_vect_multiple_sizes { } { set et_vect_multiple_sizes_saved($et_index) 0 if { [istarget aarch64*-*-*] - || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) + || [is-effective-target arm_neon] || (([istarget i?86-*-*] || [istarget x86_64-*-*]) && ([check_avx_available] && ![check_prefer_avx128])) } { set et_vect_multiple_sizes_saved($et_index) 1 @@ -6173,8 +6164,7 @@ proc check_effective_target_vect64 { } { verbose "check_effective_target_vect64: using cached result" 2 } else { set et_vect64_saved($et_index) 0 - if { ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok] + if { ([is-effective-target arm_neon] && [check_effective_target_arm_little_endian]) || [istarget aarch64*-*-*] || [istarget sparc*-*-*] } { @@ -8187,7 +8177,7 @@ proc check_effective_target_builtin_eh_return { } { # Return 1 if the target supports max reduction for vectors. proc check_effective_target_vect_max_reduc { } { - if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } { + if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } { return 1 } return 0