From patchwork Tue Jul 2 12:02:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1126222 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-504172-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="sDPfiA6d"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45dND60NfTz9sNC for ; Tue, 2 Jul 2019 22:03:01 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; q=dns; s= default; b=mJ9O6nhdMorihkcOqq2WszMKkbU02CyTXhzb+yFydnBhBr2zqZNo9 BfFIWr3ECFibR60eR5tWKobmBNZdjBZek5kzOpqNNK9DfQ3UpZQTfg90tzsMQv4C 3FJv7463i6v6x4odUSxm7siNXm3xMimIc3LNWIq2Yhzin33pcTRwVo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; s= default; bh=s/0iS/I/s0g3pZcc4WBaI47Aft8=; b=sDPfiA6dDcLS4W7y0uVl JzqG6QOFRqq3hzmPjQ6+eC28GHz64ExA9x1zfpByCWUtSPkNUf58iozceTBcR8DA PAVyQmuDA0m3fY2OKz5xmNMK7Z6QUCcc3MJ9G51dUBLY0CfU0YY8YY4H2lprTXX7 bcNKuZ0P+zHM0leNoktX1NM= Received: (qmail 59126 invoked by alias); 2 Jul 2019 12:02:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 59117 invoked by uid 89); 2 Jul 2019 12:02:55 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-17.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 spammy=SYMBOL_REF_P, symbol_ref_p X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 02 Jul 2019 12:02:53 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=svr-ies-mbx-01.mgc.mentorg.com) by relay1.mentorg.com with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) id 1hiHUn-0001bf-W7 from Andrew_Stubbs@mentor.com for gcc-patches@gcc.gnu.org; Tue, 02 Jul 2019 05:02:50 -0700 Received: from [127.0.0.1] (137.202.0.90) by svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Tue, 2 Jul 2019 13:02:46 +0100 From: Andrew Stubbs Subject: [committed, amdgcn] Fix regrename ICE To: "gcc-patches@gcc.gnu.org" Message-ID: <5e2fdb33-f2e8-fe51-d7c8-736700bb6f43@codesourcery.com> Date: Tue, 2 Jul 2019 13:02:45 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.2 MIME-Version: 1.0 This patch fixes a regrename ICE that affects testcase gfortran.dg/optional_absent_4.f90. The problem was that the save-restore pattern for the SCC register conflicted with the live value in that register. That is, it looked fine in the dump files and assembler output, but broken the assumptions about how RTX entries are shared in memory. The fix is simply to hide the save-restore, for now. We end up with the same instruction sequence anyway. Andrew Stubbs Mentor Graphics / CodeSourcery Fix amdgcn regrename ICE. 2019-07-02 Andrew Stubbs gcc/ * config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn with inlined save and restore. diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md index 1f06d0bd5cc..7e5cf17629d 100644 --- a/gcc/config/gcn/gcn.md +++ b/gcc/config/gcn/gcn.md @@ -830,18 +830,36 @@ [(set_attr "type" "mult") (set_attr "length" "32")]) -(define_insn_and_split "movdi_symbol_save_scc" +(define_insn "movdi_symbol_save_scc" [(set (match_operand:DI 0 "nonimmediate_operand" "=Sg") (match_operand:DI 1 "general_operand" "Y")) (clobber (reg:BI CC_SAVE_REG))] - "GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF + "(GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF) && (lra_in_progress || reload_completed)" - "#" - "reload_completed" - [(set (reg:BI CC_SAVE_REG) (reg:BI SCC_REG)) - (parallel [(set (match_dup 0) (match_dup 1)) - (clobber (reg:BI SCC_REG))]) - (set (reg:BI SCC_REG) (reg:BI CC_SAVE_REG))]) + { + /* !!! These sequences clobber CC_SAVE_REG. */ + + if (SYMBOL_REF_P (operands[1]) + && SYMBOL_REF_WEAK (operands[1])) + return "; s_mov_b32\ts22, scc is not supported by the assembler.\;" + ".long\t0xbe9600fd\;" + "s_getpc_b64\t%0\;" + "s_add_u32\t%L0, %L0, %1@gotpcrel32@lo+4\;" + "s_addc_u32\t%H0, %H0, %1@gotpcrel32@hi+4\;" + "s_load_dwordx2\t%0, %0\;" + "s_cmpk_lg_u32\ts22, 0\;" + "s_waitcnt\tlgkmcnt(0)"; + + return "; s_mov_b32\ts22, scc is not supported by the assembler.\;" + ".long\t0xbe9600fd\;" + "s_getpc_b64\t%0\;" + "s_add_u32\t%L0, %L0, %1@rel32@lo+4\;" + "s_addc_u32\t%H0, %H0, %1@rel32@hi+4\;" + "s_cmpk_lg_u32\ts22, 0"; + } + [(set_attr "type" "mult") + (set_attr "length" "40")]) + (define_insn "gcn_indirect_call" [(call (mem (match_operand:DI 0 "register_operand" "Sg"))