From patchwork Tue Jun 29 14:50:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julian Brown X-Patchwork-Id: 1498393 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GDnVv3Wqzz9sWG for ; Wed, 30 Jun 2021 00:51:51 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5E1AE389682B for ; Tue, 29 Jun 2021 14:51:49 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa1.mentor.iphmx.com (esa1.mentor.iphmx.com [68.232.129.153]) by sourceware.org (Postfix) with ESMTPS id 0ABB13864813 for ; Tue, 29 Jun 2021 14:50:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0ABB13864813 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com IronPort-SDR: qRnOJavE4xbKz0zOw52wSvvrDwWGnqP5sdRxywh4+7bmzkS8zWI5MvtSUvqyhEc7k/qn5cUbXI gMiuC8NE1VklQT0MTgRccxykq6FXJzR8JAUPgI/5vVOJa5zErYOb+UycpNP7gIfsyAc0VlRY0Y xCdWaGDTTW/XgkQ9qTS4tkcHQJYpGKX3v+l/PJE+0DI1aKTHT49VsvJq+rXeDQKXaimpZWIgQn HHVjN93nFq6hPgGFzSQLLI9iY0fD0gZ6aJJRZdCCB4wbJ71igijGvdMuvZ8TrPaoNyv91cUCZ0 g54= X-IronPort-AV: E=Sophos;i="5.83,309,1616486400"; d="scan'208";a="65377577" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 29 Jun 2021 06:50:55 -0800 IronPort-SDR: Tp6lTSGDT6AbUG9mx+S8GKQYdv8UPdJSbhs5O/M5cAkVATEfVG9MCbj8Xw6KLvzjgU3P4s3uei UTlwe72Ha05+2oAxhgkmTKUEODy5JstYto3occzPRRrPo/ZOhehCdxWD9gswz2wAnmb92Gl9za DBhZtXl5+0PrsssyKsgqkKRAiJD2flQkbHE8KazlVqtG0XEn6DeEA2XPh73oGsEGzhnPRNxIWs DM33J7WT3+m9wrI0z12+pp6bTjf7wwCH6aj87BWpJ/UzI2EhT3GiW9e+qznirQQfMNKkGbSNvl ZWw= From: Julian Brown To: Subject: [PATCH 1/3] amdgcn: Mark s_mulk_i32 as clobbering SCC Date: Tue, 29 Jun 2021 07:50:38 -0700 Message-ID: <5d5678393d10b9954479062cd145766f3b508adb.1624977771.git.julian@codesourcery.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: SVR-IES-MBX-03.mgc.mentorg.com (139.181.222.3) To SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Stubbs Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" The s_mulk_i32 instruction sets the SCC status register according to whether the multiplication overflows, but that is not currently modelled in the GCN backend. AFAIK this is a latent bug and hasn't been noticed "in the wild", but it should be fixed. I will commit shortly. Julian 2021-06-29 Julian Brown gcc/ * config/gcn/gcn.md (mulsi3): Make s_mulk_i32 variant clobber SCC. --- gcc/config/gcn/gcn.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md index b5f895a93e2..cca45522fba 100644 --- a/gcc/config/gcn/gcn.md +++ b/gcc/config/gcn/gcn.md @@ -1371,10 +1371,13 @@ ; Vector multiply has vop3a encoding, but no corresponding vop2a, so no long ; immediate. +; The "s_mulk_i32" variant sets SCC to indicate overflow (which we don't care +; about here, but we need to indicate the clobbering). (define_insn "mulsi3" [(set (match_operand:SI 0 "register_operand" "= Sg,Sg, Sg, v") (mult:SI (match_operand:SI 1 "gcn_alu_operand" "%SgA, 0,SgA, v") - (match_operand:SI 2 "gcn_alu_operand" " SgA, J, B,vASv")))] + (match_operand:SI 2 "gcn_alu_operand" " SgA, J, B,vASv"))) + (clobber (match_scratch:BI 3 "=X,cs, X, X"))] "" "@ s_mul_i32\t%0, %1, %2