| Message ID | 5afdf2da-8e44-bc4d-8654-796a9f8b9ee5@suse.de |
|---|---|
| State | New |
| Headers | show |
| Series | final: go down ASHIFT in walk_alter_subreg | expand |
Michael Matz <matz@suse.de> writes: > when experimenting with m68k plus LRA one of the > changes in the backend is to accept ASHIFTs (not only > MULT) as scale code for address indices. When then not > turning on LRA but using reload those addresses are > presented to it which chokes on them. While reload is > going away the change to make them work doesn't really hurt > (and generally seems useful, as MULT and ASHIFT really are > no different). So just add it. > > PR target/116413 > * final.cc (walk_alter_subreg): Recurse on AHIFT. > --- > gcc/final.cc | 1 + > 1 file changed, 1 insertion(+) > --- > > Regstrapped on x86-64-linux. Okay? OK, thanks. If things are working correctly, this should only trigger in LEAs, and MULT should only occur in MEMs. Richard > > diff --git a/gcc/final.cc b/gcc/final.cc > index eb9e065d9f0..5d911586de5 100644 > --- a/gcc/final.cc > +++ b/gcc/final.cc > @@ -3146,6 +3146,7 @@ walk_alter_subreg (rtx *xp, bool *changed) > case PLUS: > case MULT: > case AND: > + case ASHIFT: > XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); > XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); > break;
diff --git a/gcc/final.cc b/gcc/final.cc index eb9e065d9f0..5d911586de5 100644 --- a/gcc/final.cc +++ b/gcc/final.cc @@ -3146,6 +3146,7 @@ walk_alter_subreg (rtx *xp, bool *changed) case PLUS: case MULT: case AND: + case ASHIFT: XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); break;