From patchwork Wed Jun 22 09:38:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 639041 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rZKKQ2ZJJz9t0X for ; Wed, 22 Jun 2016 19:38:34 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=LnaHPw0x; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=Mi2hNsdyM2DtEf9NqlsKgmH0X0u19yu1a5dRJZqdLxG BQ3mYCmH4yjGaxDBQ0QdxR2Y8iSBdGh/YTvZusNtabXgBLjLsouAAKVKKN0ikpnW xQYMQNldNOz3nMasKXaIb2wBJOq5z/PcvWNZaKmuhTkhP8XloRCP/jWWxaRX5jcA = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=ct2Cw0S0ov/8PvkEai2YoGWpIEU=; b=LnaHPw0xYpKf0ocWp xDN95bK/6elSMsRdimp695XYueMip7BCO+87zARSFi5EmATm3rys7uzs1sXllTWT YcU5uSlYWv/LNLe9aaMqcnPpoV/bdRjeuCv+ri6D0yLLIY+9tMFr1vgiOlJigNkG +NWiNwbrUMvdvwPtOXJ51KtLX0= Received: (qmail 86283 invoked by alias); 22 Jun 2016 09:38:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 86270 invoked by uid 89); 22 Jun 2016 09:38:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=2016-06-22 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 22 Jun 2016 09:38:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE109226; Wed, 22 Jun 2016 02:38:58 -0700 (PDT) Received: from [10.2.206.43] (e100706-lin.cambridge.arm.com [10.2.206.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4A5C33F21A; Wed, 22 Jun 2016 02:38:11 -0700 (PDT) Message-ID: <576A5C81.6090305@foss.arm.com> Date: Wed, 22 Jun 2016 10:38:09 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Ramana Radhakrishnan , Richard Earnshaw Subject: [PATCH][ARM] Add support for some ARMv8-A cores to driver-arm.c Hi all, This patch adds entries to the arm_cpu_table in driver-arm.c to enable it to perform native CPU detection on some aarch32 ARMv8-A systems. The cores added are Cortex-A32, Cortex-A35, Cortex-A53, Cortex-A57, Cortex-A72, Cortex-A73. Bootstrapped and tested on arm-none-linux-gnueabihf. Ok for trunk? Thanks, Kyrill 2016-06-22 Kyrylo Tkachov * config/arm/driver-arm.c (arm_cpu_table): Add entries for cortex-a32, cortex-a35, cortex-a53, cortex-a57, cortex-a72, cortex-a73. diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c index 95dc9d53b6c179946d62f45b2b0d4a21960405b8..45f2f2a1a1de748b3c3ee551945cfe1b8945bc72 100644 --- a/gcc/config/arm/driver-arm.c +++ b/gcc/config/arm/driver-arm.c @@ -46,6 +46,12 @@ static struct vendor_cpu arm_cpu_table[] = { {"0xc0d", "armv7ve", "cortex-a12"}, {"0xc0e", "armv7ve", "cortex-a17"}, {"0xc0f", "armv7ve", "cortex-a15"}, + {"0xd01", "armv8-a+crc", "cortex-a32"}, + {"0xd04", "armv8-a+crc", "cortex-a35"}, + {"0xd03", "armv8-a+crc", "cortex-a53"}, + {"0xd07", "armv8-a+crc", "cortex-a57"}, + {"0xd08", "armv8-a+crc", "cortex-a72"}, + {"0xd09", "armv8-a+crc", "cortex-a73"}, {"0xc14", "armv7-r", "cortex-r4"}, {"0xc15", "armv7-r", "cortex-r5"}, {"0xc20", "armv6-m", "cortex-m0"},