From patchwork Wed Apr 27 14:10:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 615664 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qw2280xnpz9t0t for ; Thu, 28 Apr 2016 00:11:27 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=Bm5/6STe; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=hOaOtF6maI/KwmT6tr76qbwcFhqGbE5rj9ChoC2PfqF 9nwzLrM+POAsNj0htkQ+A1yNoantCr3mfiBWmco5u91XEKQWdZc+aJq4B9y0pNoX DnJsOXiwW9BFrJ00ttzP7PPJpsWr5sxwDHtF1jULVDBI8QmeuWMPfiR+aVh7Cgsw = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=ex7t+y5srydAJ2JsBx82nakanxU=; b=Bm5/6STeloCC6PJSB EMAqB2idMyOciGaVq+qlzpzAKBjoNi8d2Dl2qSUgKSXXngyGx9JUsYEQXaN+mgvH NZjPAeWI05gHE9Pj9hfdjxMf5EPNOYNCZu4kMY4N2uf8/I6MrGo7tTFOBfTEXFH1 NeVYAGM4YrDLq1egcXTSWPRy6o= Received: (qmail 69444 invoked by alias); 27 Apr 2016 14:11:02 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 69377 invoked by uid 89); 27 Apr 2016 14:11:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=Hx-languages-length:1712, SHORT, 2016-04-27, 20160427 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 27 Apr 2016 14:10:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B8AF13A; Wed, 27 Apr 2016 07:10:50 -0700 (PDT) Received: from [10.2.206.43] (e100706-lin.cambridge.arm.com [10.2.206.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 54C103F42B; Wed, 27 Apr 2016 07:10:49 -0700 (PDT) Message-ID: <5720C867.3060708@foss.arm.com> Date: Wed, 27 Apr 2016 15:10:47 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Marcus Shawcroft , Richard Earnshaw , James Greenhalgh Subject: [PATCH][AArch64] Simplify ashl3 expander for SHORT modes Hi all, The ashl3 expander for QI and HI modes is needlessly obfuscated. The 2nd operand predicate accepts nonmemory_operand but the expand code FAILs if it's not a CONST_INT. We can just demand a const_int_operand in the predicate and remove the extra CONST_INT check. Looking at git blame, it seems it was written that way as a result of some other refactoring a few years back for an unrelated change. Bootstrapped and tested on aarch64-none-linux-gnu. Ok for trunk? Thanks, Kyrill 2016-04-27 Kyrylo Tkachov * config/aarch64/aarch64.md (ashl3, SHORT modes): Use const_int_operand for operand 2 predicate. Simplify expand code as a result. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index d7a669e40f9d4ae863c3e48b73f0eebdecea340d..c08e89bc4eb7b51dbb1e5f893238824caeb5f317 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3770,22 +3770,16 @@ (define_expand "3" (define_expand "ashl3" [(set (match_operand:SHORT 0 "register_operand") (ashift:SHORT (match_operand:SHORT 1 "register_operand") - (match_operand:QI 2 "nonmemory_operand")))] + (match_operand:QI 2 "const_int_operand")))] "" { - if (CONST_INT_P (operands[2])) - { - operands[2] = GEN_INT (INTVAL (operands[2]) - & (GET_MODE_BITSIZE (mode) - 1)); + operands[2] = GEN_INT (INTVAL (operands[2]) & GET_MODE_MASK (mode)); - if (operands[2] == const0_rtx) - { - emit_insn (gen_mov (operands[0], operands[1])); - DONE; - } + if (operands[2] == const0_rtx) + { + emit_insn (gen_mov (operands[0], operands[1])); + DONE; } - else - FAIL; } )