@@ -1606,6 +1606,9 @@ ARM target prefers @code{LDRD} and @code{STRD} instructions over
@subsubsection AArch64-specific attributes
@table @code
+@item aarch64_asm_<ext>_ok
+AArch64 assembler supports the architecture extension @code{ext} via the
+@code{.arch_extension} pseudo-op.
@item aarch64_tiny
AArch64 target which generates instruction sequences for tiny memory model.
@item aarch64_small
@@ -1,4 +1,5 @@
/* { dg-do assemble } */
+/* { dg-require-effective-target aarch64_asm_lse_ok } */
/* { dg-options "-march=armv8-a" } */
/* Make sure that the function header in assembly doesn't override
@@ -6719,6 +6719,23 @@ proc check_effective_target_aarch64_tiny { } {
}
}
+# Create functions to check that the AArch64 assembler supports the
+# various architecture extensions via the .arch_extension pseudo-op.
+
+foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
+ eval [string map [list FUNC $aarch64_ext] {
+ proc check_effective_target_aarch64_asm_FUNC_ok { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_FUNC_assembler object {
+ __asm__ (".arch_extension FUNC");
+ } "-march=armv8-a+FUNC"]
+ } else {
+ return 0
+ }
+ }
+ }]
+}
+
proc check_effective_target_aarch64_small { } {
if { [istarget aarch64*-*-*] } {
return [check_no_compiler_messages aarch64_small object {