From patchwork Wed Feb 17 13:40:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 584156 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E22481401DA for ; Thu, 18 Feb 2016 00:40:29 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=agKCWipa; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=JclfOsUF2IipKtlPy qK5Jduo/Wwm5EgjUTzy9Z5iKCHydlFZjntw2q+mrZ3eJGSSw51p19JLPVHG4Xmec WX/vRc9IYIdW53LBVXvDprHs+wai4fluH0rXjAxaRUkM+74wRGWz9ewLOCuUuOK9 cjjpCq/tVJs3gglRZsXP4+pi2g= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=cV1W3PZaYwxAHRjFDHFcO5m HZMo=; b=agKCWipa2aO/KwopMPBf1GUSdPfec8NpY0qlQC7H6f/1txpG+Cw1+HQ Z+VKe7Z0MVId73kEoSsbFQWowTeAqmhfBiWG+s+gliIFNVWmxfWv0gqoNHE2gn6V LoyygJjZfMdczGCwNuz+W9nzkwPJnQqm4iUWabKeTZi/GpjB7h/E= Received: (qmail 35217 invoked by alias); 17 Feb 2016 13:40:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 35171 invoked by uid 89); 17 Feb 2016 13:40:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=3887, H*u:31.2.0, H*UA:31.2.0, ite X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 17 Feb 2016 13:40:09 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4DD6B3A1; Wed, 17 Feb 2016 05:39:17 -0800 (PST) Received: from [10.2.206.200] (e100706-lin.cambridge.arm.com [10.2.206.200]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B933B3F21A; Wed, 17 Feb 2016 05:40:06 -0800 (PST) Message-ID: <56C47835.8030909@foss.arm.com> Date: Wed, 17 Feb 2016 13:40:05 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Nick Clifton CC: gcc-patches@gcc.gnu.org Subject: Re: [PATCH][ARM] PR target/69161: Don't ignore mode when matching comparison operator in cstore-like patterns References: <878u2j5vjo.fsf@redhat.com> In-Reply-To: <878u2j5vjo.fsf@redhat.com> Hi Nick, On 17/02/16 13:13, Nick Clifton wrote: > Hi Kyrill, > >> Ok for trunk? >> >> 2016-01-29 Kyrylo Tkachov >> >> PR target/69161 >> * config/arm/predicates.md (arm_comparison_operator_mode): >> New predicate. >> * config/arm/arm.md (*mov_scc): Use arm_comparison_operator_mode >> instead of arm_comparison_operator. >> (*mov_negscc): Likewise. >> (*mov_notscc): Likewise. >> * config/arm/thumb2.md (*thumb2_mov_scc): Likewise. >> (*thumb2_mov_negscc): Likewise. >> (*thumb2_mov_negscc_strict_it): Likewise. >> (*thumb2_mov_notscc): Likewise. >> (*thumb2_mov_notscc_strict_it): Likewise. > Approved - please apply - but ... > Thanks! >> diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md >> index c66c31d5c6047aa7decfe7e95d111d5fbf6fb52e..b8f09ab6b109f80abe2df08a8b7f954f521ec1bf 100644 >> --- a/gcc/config/arm/predicates.md >> +++ b/gcc/config/arm/predicates.md >> @@ -341,6 +341,11 @@ (define_special_predicate "arm_comparison_operator" >> (and (match_operand 0 "expandable_comparison_operator") >> (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) >> >> +;; Likewise, but don't ignore the mode. >> +(define_predicate "arm_comparison_operator_mode" > Please could you extend the comment here to reference the PR. That way > anyone reading this code who wonders why we need to have two versions of > the same predicate will be able understand what is happening. Ok, here's what I committed with r233495. Kyrill > Cheers > Nick > commit 59380f7f3e34f4c4e17a610e67341a0de0272c15 Author: Kyrylo Tkachov Date: Wed Jan 13 13:29:36 2016 +0000 [ARM] PR target/69161: Don't ignore mode when matching comparison operator in cstore patterns diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 5129e85..15b4a4a 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -7190,7 +7190,7 @@ (define_expand "cstore_cc" (define_insn_and_split "*mov_scc" [(set (match_operand:SI 0 "s_register_operand" "=r") - (match_operator:SI 1 "arm_comparison_operator" + (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)]))] "TARGET_ARM" "#" ; "mov%D1\\t%0, #0\;mov%d1\\t%0, #1" @@ -7207,7 +7207,7 @@ (define_insn_and_split "*mov_scc" (define_insn_and_split "*mov_negscc" [(set (match_operand:SI 0 "s_register_operand" "=r") - (neg:SI (match_operator:SI 1 "arm_comparison_operator" + (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] "TARGET_ARM" "#" ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index c66c31d..f696458 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -341,6 +341,13 @@ (define_special_predicate "arm_comparison_operator" (and (match_operand 0 "expandable_comparison_operator") (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) +;; Likewise, but don't ignore the mode. +;; RTL SET operations require their operands source and destination have +;; the same modes, so we can't ignore the modes there. See PR target/69161. +(define_predicate "arm_comparison_operator_mode" + (and (match_operand 0 "expandable_comparison_operator") + (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) + (define_special_predicate "lt_ge_comparison_operator" (match_code "lt,ge")) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 39a3d80..9925365 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -370,7 +370,7 @@ (define_insn "*thumb2_cmpsi_neg_shiftsi" (define_insn_and_split "*thumb2_mov_scc" [(set (match_operand:SI 0 "s_register_operand" "=l,r") - (match_operator:SI 1 "arm_comparison_operator" + (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)]))] "TARGET_THUMB2" "#" ; "ite\\t%D1\;mov%D1\\t%0, #0\;mov%d1\\t%0, #1" @@ -388,7 +388,7 @@ (define_insn_and_split "*thumb2_mov_scc" (define_insn_and_split "*thumb2_mov_negscc" [(set (match_operand:SI 0 "s_register_operand" "=r") - (neg:SI (match_operator:SI 1 "arm_comparison_operator" + (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] "TARGET_THUMB2 && !arm_restrict_it" "#" ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" @@ -407,7 +407,7 @@ (define_insn_and_split "*thumb2_mov_negscc" (define_insn_and_split "*thumb2_mov_negscc_strict_it" [(set (match_operand:SI 0 "low_register_operand" "=l") - (neg:SI (match_operator:SI 1 "arm_comparison_operator" + (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] "TARGET_THUMB2 && arm_restrict_it" "#" ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\" @@ -436,7 +436,7 @@ (define_insn_and_split "*thumb2_mov_negscc_strict_it" (define_insn_and_split "*thumb2_mov_notscc" [(set (match_operand:SI 0 "s_register_operand" "=r") - (not:SI (match_operator:SI 1 "arm_comparison_operator" + (not:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] "TARGET_THUMB2 && !arm_restrict_it" "#" ; "ite\\t%D1\;mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1" @@ -456,7 +456,7 @@ (define_insn_and_split "*thumb2_mov_notscc" (define_insn_and_split "*thumb2_mov_notscc_strict_it" [(set (match_operand:SI 0 "low_register_operand" "=l") - (not:SI (match_operator:SI 1 "arm_comparison_operator" + (not:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] "TARGET_THUMB2 && arm_restrict_it" "#" ; "mvn %0, #0 ; it%d1 ; lsl%d1 %0, %0, #1"