From patchwork Thu Jan 21 17:51:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 571286 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B405F140BA8 for ; Fri, 22 Jan 2016 04:51:35 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=xhIuekrT; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=ucQeeqXgWq1s4/M/FBjd+oyHi7/Vo4lthtpvsnAMOU9 NcuV/en0jwG/ufKJBpPeCFParT3U/E3SWvrnz6/7S1zkRgiMA+H1TiDa0CayzPzy eiskC+5TqdOoF8Tf7Hb0UGev0Jw5QCq21+srYuHm644e4xe8BuF6ULL66+Y4qs5M = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=xrESNnYAi1VG3vijWHMJO8Ar9F4=; b=xhIuekrTjD5l9oxn+ AboEHgmwKoBwLHsLfuG/nUW8nZ58aQnyuycyfhz8SjkcSfG6JsUv8mgxjtG+XxTo gNw/psEqwgsFCaJv0kqmHPK4y08NyuahBiolskW81P/v0hu85ldGic/LudpwC+Oy RsrTlLJlj0ur1QaXm/7rzcjr5U= Received: (qmail 120269 invoked by alias); 21 Jan 2016 17:51:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 120252 invoked by uid 89); 21 Jan 2016 17:51:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=kyrill, sk:armnon, sk:arm-non, Kyrill X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 21 Jan 2016 17:51:25 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 74A6B3A8; Thu, 21 Jan 2016 09:50:44 -0800 (PST) Received: from [10.2.206.200] (e100706-lin.cambridge.arm.com [10.2.206.200]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 653AE3F529; Thu, 21 Jan 2016 09:51:22 -0800 (PST) Message-ID: <56A11A98.1020503@foss.arm.com> Date: Thu, 21 Jan 2016 17:51:20 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Ramana Radhakrishnan , Richard Earnshaw , shenhan@google.com Subject: [PATCH][ARM] Fix PR target/69403: Bug in thumb2_ior_scc_strict_it pattern Hi all, In this wrong-code PR the pattern for performing x = x | for -mrestrict-it is buggy and ends up writing 1 to the result register rather than orring it. The offending pattern is *thumb2_ior_scc_strict_it. My proposed solution is to rewrite it as a splitter, remove the alternative for the case where operands[1] and 0 are the same reg that emits the bogus: it ; mov%0, #1; it ; orr %0, %1 to emit the RTL equivalent to: orr %0, %1, #1; it ; mov%D2\\t%0, %1 while marking operand 0 as an earlyclobber operand so that it doesn't get assigned the same register as operand 1. This way we avoid the wrong-code, make the sequence better (by eliminating the move of #1 into a register and relaxing the constraints from 'l' to 'r' since only the register move has to be conditional). and still stay within the rules for arm_restrict_it. Bootstrapped and tested on arm-none-linux-gnueabihf configured --with-arch=armv8-a and --with-mode=thumb. Ok for trunk, GCC 5 and 4.9? Han, can you please try this out to see if it solves the problem on your end as well? Thanks, Kyrill 2016-01-21 Kyrylo Tkachov PR target/69403 * config/arm/thumb2.md (*thumb2_ior_scc_strict_it): Convert to define_insn_and_split. Ensure operands[1] and operands[0] do not get assigned the same register. 2016-01-21 Kyrylo Tkachov PR target/69403 * gcc.c-torture/execute/pr69403.c: New test. commit 536a372b7adbb89afa56f61a511ae86e00b7385f Author: Kyrylo Tkachov Date: Thu Jan 21 10:15:38 2016 +0000 [ARM] Fix PR target/69403: Bug in thumb2_ior_scc_strict_it pattern diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 7368d06..9925365 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -663,15 +663,27 @@ (define_insn_and_split "*thumb2_ior_scc" (set_attr "type" "multiple")] ) -(define_insn "*thumb2_ior_scc_strict_it" - [(set (match_operand:SI 0 "s_register_operand" "=l,l") +(define_insn_and_split "*thumb2_ior_scc_strict_it" + [(set (match_operand:SI 0 "s_register_operand" "=&r") (ior:SI (match_operator:SI 2 "arm_comparison_operator" [(match_operand 3 "cc_register" "") (const_int 0)]) - (match_operand:SI 1 "s_register_operand" "0,?l")))] + (match_operand:SI 1 "s_register_operand" "r")))] "TARGET_THUMB2 && arm_restrict_it" - "@ - it\\t%d2\;mov%d2\\t%0, #1\;it\\t%d2\;orr%d2\\t%0, %1 - mov\\t%0, #1\;orr\\t%0, %1\;it\\t%D2\;mov%D2\\t%0, %1" + "#" ; orr\\t%0, %1, #1\;it\\t%D2\;mov%D2\\t%0, %1 + "&& reload_completed" + [(set (match_dup 0) (ior:SI (match_dup 1) (const_int 1))) + (cond_exec (match_dup 4) + (set (match_dup 0) (match_dup 1)))] + { + machine_mode mode = GET_MODE (operands[3]); + rtx_code rc = GET_CODE (operands[2]); + + if (mode == CCFPmode || mode == CCFPEmode) + rc = reverse_condition_maybe_unordered (rc); + else + rc = reverse_condition (rc); + operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[3], const0_rtx); + } [(set_attr "conds" "use") (set_attr "length" "8") (set_attr "type" "multiple")] diff --git a/gcc/testsuite/gcc.c-torture/execute/pr69403.c b/gcc/testsuite/gcc.c-torture/execute/pr69403.c new file mode 100644 index 0000000..097d366 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr69403.c @@ -0,0 +1,20 @@ +/* PR target/69403. */ + +int a, b, c; + +__attribute__ ((__noinline__)) int +fn1 () +{ + if ((b | (a != (a & c))) == 1) + __builtin_abort (); + return 0; +} + +int +main (void) +{ + a = 5; + c = 1; + b = 6; + return fn1 (); +}