From patchwork Thu Jan 14 12:37:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 567367 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AA00414031E for ; Thu, 14 Jan 2016 23:37:45 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=HeTdJ+9P; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=rQ2bdSIXvtBYW9C13 Ydvy7Wd1NpHAOxeop7a6R1Hz51cywunZOJ3e3pwi0qrd5IHXuF53e/r9vQ+gTwW9 1i/YBUJN8RvzqnzrGQ0jnEadD+McEmbrM2vgg9SwadVqFTpGHLtwb6/nFlje9Yr0 slbQXgPBSjveShTHmQgse3ZNPA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=RU/nVfJWDJ78mG9DWQwLIDf WhNA=; b=HeTdJ+9PhDd1Burt7UL5iUUJlXd7VOC+syTXbmiGqlijAdQ8T3df6nu HSP7FsjBwmU/ejUGCHDCpwaqFVG6K4tLI5QGsO5Op4OgnELXpHausPiiquZUD7n4 VoosLZSDdIlDG9WCLS5LrHhUXDEPV1x/CnxOQ/GdbGSEGYRSqw80= Received: (qmail 52147 invoked by alias); 14 Jan 2016 12:37:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 52135 invoked by uid 89); 14 Jan 2016 12:37:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.9 required=5.0 tests=BAYES_50, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, KHOP_DYNAMIC, RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 spammy=HX-Envelope-From:sk:christi, Builtin, 97, 87 X-HELO: mx07-00178001.pphosted.com Received: from mx07-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (62.209.51.94) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 14 Jan 2016 12:37:34 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id u0ECafxA006567; Thu, 14 Jan 2016 13:37:26 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 20d6jejdkk-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 14 Jan 2016 13:37:26 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5B2F934; Thu, 14 Jan 2016 12:36:40 +0000 (GMT) Received: from Webmail-eu.st.com (safex1hubcas2.st.com [10.75.90.16]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D41BB53FB; Thu, 14 Jan 2016 12:37:25 +0000 (GMT) Received: from [164.129.122.197] (164.129.122.197) by webmail-eu.st.com (10.75.90.13) with Microsoft SMTP Server (TLS) id 8.3.389.2; Thu, 14 Jan 2016 13:37:25 +0100 Subject: Re: [PATCH, ARM] PR68674 Fix LTO support for neon builtin and error catching (ping) To: Kyrill Tkachov , "Richard.Earnshaw@arm.com" , "ramana.radhakrishnan@foss.arm.com" , "gcc-patches@gcc.gnu.org" References: <568D1E7B.1090609@st.com> <568D3B10.6080309@foss.arm.com> <568D3F76.2020202@foss.arm.com> <568D4B4D.2010304@st.com> <568D4D28.8010500@foss.arm.com> From: Christian Bruel X-No-Archive: yes Message-ID: <56979685.4050406@st.com> Date: Thu, 14 Jan 2016 13:37:25 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <568D4D28.8010500@foss.arm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-01-14_08:, , signatures=0 X-IsSubscribed: yes Here is the rebased patch after the #pragma GCC target warning fixes. I also disabled the builtins initialisations when float-abi is solft as you suggested. 2015-01-16 Christian Bruel PR target/65837 * config/arm/arm-builtins.c (ARM_BUILTIN_CRYPTO_BASE): New enum tag. (arm_init_neon_builtins_internal): Rename arm_init_neon_builtins, (arm_init_crypto_builtins_internal): Rename arm_init_crypto_builtins. use add_builtin_function_ext_scope instead of add_builtin_function. (neon_set_p, neon_crypto_set_p): Remove. (arm_init_builtins): Always call arm_init_neon_builtins and arm_init_crypto_builtins. (arm_expand_builtin): Check that builtins are allowed for the arch. * config/arm/arm-protos.h (arm_init_neon_builtins): Remove prototype. * config/arm/arm.c (arm_valid_target_attribute_tree): Remove arm_init_neon_builtins call. 2015-01-16 Christian Bruel PR target/65837 * gcc.target/arm/attr-neon-builtin-fail2.c: New test. * gcc.target/arm/lto/pr65837-attr_0.c: New test. * gcc.target/arm/lto/pr65837_0.c: Fix skip condition and use ACLE name. Index: gcc/config/arm/arm-builtins.c =================================================================== --- gcc/config/arm/arm-builtins.c (revision 232361) +++ gcc/config/arm/arm-builtins.c (working copy) @@ -526,6 +526,8 @@ enum arm_builtins #define CRYPTO3(L, U, M1, M2, M3, M4) \ ARM_BUILTIN_CRYPTO_##U, + ARM_BUILTIN_CRYPTO_BASE, + #include "crypto.def" #undef CRYPTO1 @@ -893,8 +895,12 @@ arm_init_simd_builtin_scalar_types (void) "__builtin_neon_uti"); } +/* Set up all the NEON builtins, even builtins for instructions that are not + in the current target ISA to allow the user to compile particular modules + with different target specific options that differ from the command line + options. */ static void -arm_init_neon_builtins_internal (void) +arm_init_neon_builtins (void) { unsigned int i, fcode = ARM_BUILTIN_NEON_PATTERN_START; @@ -1018,7 +1024,7 @@ static void } static void -arm_init_crypto_builtins_internal (void) +arm_init_crypto_builtins (void) { tree V16UQI_type_node = arm_simd_builtin_type (V16QImode, true, false); @@ -1098,25 +1104,6 @@ static void #undef FT3 } -static bool neon_set_p = false; -static bool neon_crypto_set_p = false; - -void -arm_init_neon_builtins (void) -{ - if (! neon_set_p) - { - neon_set_p = true; - arm_init_neon_builtins_internal (); - } - - if (! neon_crypto_set_p && TARGET_CRYPTO && TARGET_HARD_FLOAT) - { - neon_crypto_set_p = true; - arm_init_crypto_builtins_internal (); - } -} - #undef NUM_DREG_TYPES #undef NUM_QREG_TYPES @@ -1777,9 +1764,13 @@ arm_init_builtins (void) arm_init_neon_builtins which uses it. */ arm_init_fp16_builtins (); - if (TARGET_NEON) - arm_init_neon_builtins (); + if (TARGET_HARD_FLOAT) + { + arm_init_neon_builtins (); + arm_init_crypto_builtins (); + } + if (TARGET_CRC32) arm_init_crc32_builtins (); @@ -2226,6 +2217,15 @@ constant_arg: static rtx arm_expand_neon_builtin (int fcode, tree exp, rtx target) { + /* Check in the context of the function making the call whether the + builtin is supported. */ + if (! TARGET_NEON) + { + fatal_error (input_location, + "You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use these intrinsics."); + return const0_rtx; + } + if (fcode == ARM_BUILTIN_NEON_LANE_CHECK) { /* Builtin is only to check bounds of the lane passed to some intrinsics @@ -2336,6 +2336,16 @@ arm_expand_builtin (tree exp, if (fcode >= ARM_BUILTIN_NEON_BASE) return arm_expand_neon_builtin (fcode, exp, target); + /* Check in the context of the function making the call whether the + builtin is supported. */ + if (fcode >= ARM_BUILTIN_CRYPTO_BASE + && (!TARGET_CRYPTO || !TARGET_HARD_FLOAT)) + { + fatal_error (input_location, + "You must enable crypto intrinsics (e.g. include -mfloat-abi=softfp -mfpu=crypto-neon...) to use these intrinsics."); + return const0_rtx; + } + switch (fcode) { case ARM_BUILTIN_GET_FPSCR: Index: gcc/config/arm/arm-protos.h =================================================================== --- gcc/config/arm/arm-protos.h (revision 232361) +++ gcc/config/arm/arm-protos.h (working copy) @@ -213,7 +213,6 @@ extern void arm_mark_dllimport (tree); extern bool arm_change_mode_p (tree); #endif -extern void arm_init_neon_builtins (void); extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *, struct gcc_options *); extern void arm_pr_long_calls (struct cpp_reader *); Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 232361) +++ gcc/config/arm/arm.c (working copy) @@ -29937,9 +29937,6 @@ arm_valid_target_attribute_tree (tree args, struct /* Do any overrides, such as global options arch=xxx. */ arm_option_override_internal (opts, opts_set); - if (TARGET_NEON) - arm_init_neon_builtins (); - return build_target_option_node (opts); } Index: gcc/testsuite/gcc.target/arm/lto/pr65837-attr_0.c =================================================================== --- gcc/testsuite/gcc.target/arm/lto/pr65837-attr_0.c (revision 0) +++ gcc/testsuite/gcc.target/arm/lto/pr65837-attr_0.c (working copy) @@ -0,0 +1,16 @@ +/* { dg-lto-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-lto-options {{-flto}} } */ + +#include "arm_neon.h" + +#pragma GCC target ("fpu=neon") + +float32x2_t a, b, c, e; + +int main() +{ + e = vmls_lane_f32 (a, b, c, 0); + return 0; +} + Index: gcc/testsuite/gcc.target/arm/lto/pr65837_0.c =================================================================== --- gcc/testsuite/gcc.target/arm/lto/pr65837_0.c (revision 232361) +++ gcc/testsuite/gcc.target/arm/lto/pr65837_0.c (working copy) @@ -1,4 +1,5 @@ /* { dg-lto-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ /* { dg-lto-options {{-flto -mfpu=neon}} } */ /* { dg-suppress-ld-options {-mfpu=neon} } */ @@ -8,7 +9,7 @@ float32x2_t a, b, c, e; int main() { - e = __builtin_neon_vmls_lanev2sf (a, b, c, 0); + e = vmls_lane_f32 (a, b, c, 0); return 0; }