2016-01-06 Christian Bruel <christian.bruel@st.com>
PR target/68674
* expr.c (expand_expr_real_1): Relayout VECTOR_TYPE expression.
2016-01-06 Christian Bruel <christian.bruel@st.com>
PR target/68674
* gcc.target/arm/pr68674.c
* gcc.target/aarch64/pr68674.c
===================================================================
@@ -9602,8 +9602,17 @@ expand_expr_real_1 (tree exp, rtx target
exp = SSA_NAME_VAR (ssa_name);
goto expand_decl_rtl;
- case PARM_DECL:
case VAR_DECL:
+ /* Vector types need to re-check the target flags,
+ since DECL_MODE might change with attribute target. */
+ if (TREE_CODE (type) == VECTOR_TYPE
+ && DECL_MODE (exp) != TYPE_MODE (type)
+ && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
+ relayout_decl (exp);
+
+ /* ... fall through ... */
+
+ case PARM_DECL:
/* If a static var's type was incomplete when the decl was written,
but the type is complete now, lay out the decl now. */
if (DECL_SIZE (exp) == 0
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -mfloat-abi=softfp" } */
+
+#include <arm_neon.h>
+
+int8x8_t a, b;
+int16x8_t e;
+
+void
+__attribute__ ((target("fpu=neon")))
+foo(void)
+{
+ e = (int16x8_t) vaddl_s8(a, b);
+}
===================================================================
@@ -0,0 +1,15 @@
+/* { dg-do assemble } */
+/* { dg-options "-O2 -march=armv8-a+nosimd" } */
+
+#include <arm_neon.h>
+
+int8x8_t a, b;
+int16x8_t e;
+
+void
+__attribute__ ((target("+simd")))
+foo(void)
+{
+ e = (int16x8_t) vaddl_s8(a, b);
+}
+