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([2601:181:c000:c497:a2a8:cdff:fe3e:b48]) by smtp.googlemail.com with ESMTPSA id g132sm27122921qhc.46.2015.12.28.05.40.39 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 28 Dec 2015 05:40:39 -0800 (PST) To: GCC Patches From: Nathan Sidwell Subject: [PTX] more predicates Message-ID: <56813BD6.7000505@acm.org> Date: Mon, 28 Dec 2015 08:40:38 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 This patch renames nvptx_reg_or_mem_operand to nvptx_nonimmediate_operand, to match the conventional nonimmediate_operand predicate. I also relax the call_operation predicate to permit any reg -- there's no need toprohibit passing stack_pointer, frame_pointer or arg_pointer. nathan 2015-12-28 Nathan Sidwell * config/nvptx/nvptx.c (nvptx_output_call_insn): Expect hard regs. * config/nvptx/nvptx.md (nvptx_reg_or_mem_operand): Rename to ... (nvptx_nonimmediate_operand): ... here. Update all uses. (call_insn_operand): Use REG_P. (call_operation): Allow hard regs. Index: gcc/config/nvptx/nvptx.c =================================================================== --- gcc/config/nvptx/nvptx.c (revision 231971) +++ gcc/config/nvptx/nvptx.c (working copy) @@ -1808,14 +1808,14 @@ nvptx_output_call_insn (rtx_insn *insn, { rtx t = XEXP (XVECEXP (pat, 0, argno), 0); machine_mode mode = GET_MODE (t); + const char *ptx_type = nvptx_ptx_type_from_mode (mode, false); /* Mode splitting has already been done. */ - fprintf (asm_out_file, "\t\t.param%s %%out_arg%d%s;\n", - nvptx_ptx_type_from_mode (mode, false), argno, - mode == QImode || mode == HImode ? "[1]" : ""); - fprintf (asm_out_file, "\t\tst.param%s [%%out_arg%d], %%r%d;\n", - nvptx_ptx_type_from_mode (mode, false), argno, - REGNO (t)); + fprintf (asm_out_file, "\t\t.param%s %%out_arg%d;\n" + "\t\tst.param%s [%%out_arg%d], ", + ptx_type, argno, ptx_type, argno); + output_reg (asm_out_file, REGNO (t), VOIDmode); + fprintf (asm_out_file, ";\n"); } fprintf (asm_out_file, "\t\tcall "); Index: gcc/config/nvptx/nvptx.md =================================================================== --- gcc/config/nvptx/nvptx.md (revision 231971) +++ gcc/config/nvptx/nvptx.md (working copy) @@ -69,7 +69,7 @@ return register_operand (op, mode); }) -(define_predicate "nvptx_reg_or_mem_operand" +(define_predicate "nvptx_nonimmediate_operand" (match_code "mem,reg") { return (REG_P (op) ? register_operand (op, mode) @@ -104,7 +104,7 @@ (define_predicate "call_insn_operand" (match_code "symbol_ref,reg") { - return GET_CODE (op) != SYMBOL_REF || SYMBOL_REF_FUNCTION_P (op); + return REG_P (op) || SYMBOL_REF_FUNCTION_P (op); }) ;; Return true if OP is a call with parallel USEs of the argument @@ -118,11 +118,7 @@ { rtx elt = XVECEXP (op, 0, i); - if (GET_CODE (elt) != USE - || GET_CODE (XEXP (elt, 0)) != REG - || XEXP (elt, 0) == frame_pointer_rtx - || XEXP (elt, 0) == arg_pointer_rtx - || XEXP (elt, 0) == stack_pointer_rtx) + if (GET_CODE (elt) != USE || !REG_P (XEXP (elt, 0))) return false; } return true; @@ -237,7 +233,7 @@ (define_insn "zero_extendqihi2" [(set (match_operand:HI 0 "nvptx_register_operand" "=R,R") - (zero_extend:HI (match_operand:QI 1 "nvptx_reg_or_mem_operand" "R,m")))] + (zero_extend:HI (match_operand:QI 1 "nvptx_nonimmediate_operand" "R,m")))] "" "@ %.\\tcvt.u16.u%T1\\t%0, %1; @@ -246,7 +242,7 @@ (define_insn "zero_extendsi2" [(set (match_operand:SI 0 "nvptx_register_operand" "=R,R") - (zero_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))] + (zero_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))] "" "@ %.\\tcvt.u32.u%T1\\t%0, %1; @@ -255,7 +251,7 @@ (define_insn "zero_extenddi2" [(set (match_operand:DI 0 "nvptx_register_operand" "=R,R") - (zero_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))] + (zero_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))] "" "@ %.\\tcvt.u64.u%T1\\t%0, %1; @@ -264,7 +260,7 @@ (define_insn "extendsi2" [(set (match_operand:SI 0 "nvptx_register_operand" "=R,R") - (sign_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))] + (sign_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))] "" "@ %.\\tcvt.s32.s%T1\\t%0, %1; @@ -273,7 +269,7 @@ (define_insn "extenddi2" [(set (match_operand:DI 0 "nvptx_register_operand" "=R,R") - (sign_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))] + (sign_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))] "" "@ %.\\tcvt.s64.s%T1\\t%0, %1; @@ -281,7 +277,7 @@ [(set_attr "subregs_ok" "true")]) (define_insn "trunchiqi2" - [(set (match_operand:QI 0 "nvptx_reg_or_mem_operand" "=R,m") + [(set (match_operand:QI 0 "nvptx_nonimmediate_operand" "=R,m") (truncate:QI (match_operand:HI 1 "nvptx_register_operand" "R,R")))] "" "@ @@ -290,7 +286,7 @@ [(set_attr "subregs_ok" "true")]) (define_insn "truncsi2" - [(set (match_operand:QHIM 0 "nvptx_reg_or_mem_operand" "=R,m") + [(set (match_operand:QHIM 0 "nvptx_nonimmediate_operand" "=R,m") (truncate:QHIM (match_operand:SI 1 "nvptx_register_operand" "R,R")))] "" "@ @@ -299,7 +295,7 @@ [(set_attr "subregs_ok" "true")]) (define_insn "truncdi2" - [(set (match_operand:QHSIM 0 "nvptx_reg_or_mem_operand" "=R,m") + [(set (match_operand:QHSIM 0 "nvptx_nonimmediate_operand" "=R,m") (truncate:QHSIM (match_operand:DI 1 "nvptx_register_operand" "R,R")))] "" "@