From patchwork Tue Dec 22 10:39:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 559962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B0B40140BB4 for ; Tue, 22 Dec 2015 21:39:37 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=beeph2ke; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=ju1RzUH669OgmaTWL EoGp3JG9yQKqRzp/gk4tr+bIz8wUdUP6+3ieVRN71PRsxT+VM2TcpSdxlKmYk0Ku DDf5S63bShiOLMa7RoNHcmSZ75f2eQWTVc/K8+Vd8Cq4ou/jrveJ0Te4ROmipwBs AJr1qfY8yX/WbG4s9oD9ULmoZ4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=QGYNR4yWjHZsGth7rlQ5Q0/ qvkM=; b=beeph2keitheOfYfMcc7k4WaydXpEaiZ1oGR2NaoI4TGZNaPFipZpQK b5nPU94OUbM02KKKkY8PMEmWcNvLkhOlSYpPmp+tERrS/c4M/RLpGRny9kNtGge9 l7fTjTgPBW54JZ59IVDdbrAEjE5DUZFTsS5mwRc9YfZyPxj5/oCI= Received: (qmail 17028 invoked by alias); 22 Dec 2015 10:39:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 17013 invoked by uid 89); 22 Dec 2015 10:39:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.4 required=5.0 tests=AWL, BAYES_20, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=tkachov, kyrill, sk:kyrylo, Tkachov X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 22 Dec 2015 10:39:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B91A649; Tue, 22 Dec 2015 02:38:59 -0800 (PST) Received: from [10.2.206.200] (e100706-lin.cambridge.arm.com [10.2.206.200]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E69AF3F308; Tue, 22 Dec 2015 02:39:25 -0800 (PST) Message-ID: <5679285C.5020809@foss.arm.com> Date: Tue, 22 Dec 2015 10:39:24 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Segher Boessenkool CC: GCC Patches Subject: Re: [PATCH][combine] Check WORD_REGISTER_OPERATIONS normally rather than through preprocessor References: <567048DD.4050100@foss.arm.com> <20151217144935.GA11032@gate.crashing.org> In-Reply-To: <20151217144935.GA11032@gate.crashing.org> On 17/12/15 14:49, Segher Boessenkool wrote: > Hi Kyrill, > > On Tue, Dec 15, 2015 at 05:07:41PM +0000, Kyrill Tkachov wrote: >> As part of the war on conditional compilation here's an #if check on >> WORD_REGISTER_OPERATIONS that >> seems to have been missed out. >> >> Bootstrapped and tested on arm, aarch64, x86_64. >> >> Is it still ok to commit these kinds of conditional compilation conversions? > You could say it is a bugfix, a missed case in the conversion ;-) > >> diff --git a/gcc/combine.c b/gcc/combine.c >> index 8601d8983ce345e2129dd047b3520d98c0582842..0658a6dbc6df6862df662bc7842c13ed06b36b04 100644 >> --- a/gcc/combine.c >> +++ b/gcc/combine.c >> @@ -11488,10 +11488,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) >> /* Try a few ways of applying the same transformation to both operands. */ >> while (1) >> { >> -#if !WORD_REGISTER_OPERATIONS >> /* The test below this one won't handle SIGN_EXTENDs on these machines, >> so check specially. */ >> - if (code != GTU && code != GEU && code != LTU && code != LEU >> + if (!WORD_REGISTER_OPERATIONS && code != GTU && code != GEU >> + && code != LTU && code != LEU > Please keep all the code != together, i.e. > > + if (!WORD_REGISTER_OPERATIONS > + && code != GTU && code != GEU && code != LTU && code != LEU > > Okay with that change. Thanks. Here's what I'll be committing. Kyrill 2015-12-21 Kyrylo Tkachov * combine.c (simplify_comparison): Convert preprocessor check of WORD_REGISTER_OPERATIONS into runtime check. diff --git a/gcc/combine.c b/gcc/combine.c index dc0d4bd52c717b88608d21dbaffe444eeb68bb2d..36ea6df15010247c96a9fcac1649d3d958d64675 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -11436,10 +11436,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) /* Try a few ways of applying the same transformation to both operands. */ while (1) { -#if !WORD_REGISTER_OPERATIONS /* The test below this one won't handle SIGN_EXTENDs on these machines, so check specially. */ - if (code != GTU && code != GEU && code != LTU && code != LEU + if (!WORD_REGISTER_OPERATIONS + && code != GTU && code != GEU && code != LTU && code != LEU && GET_CODE (op0) == ASHIFTRT && GET_CODE (op1) == ASHIFTRT && GET_CODE (XEXP (op0, 0)) == ASHIFT && GET_CODE (XEXP (op1, 0)) == ASHIFT @@ -11459,7 +11459,6 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) op0 = SUBREG_REG (XEXP (XEXP (op0, 0), 0)); op1 = SUBREG_REG (XEXP (XEXP (op1, 0), 0)); } -#endif /* If both operands are the same constant shift, see if we can ignore the shift. We can if the shift is a rotate or if the bits shifted out of