Message ID | 56698DD5.3010105@arm.com |
---|---|
State | New |
Headers | show |
On 12/10/2015 03:36 PM, Kyrill Tkachov wrote: > I'm okay with delaying this for next stage 1 if people prefer, though I > think it's > pretty low risk. I think this is something we should fix now. > + x = XEXP (x, 0); > + if (start > 0) > + x = gen_rtx_LSHIFTRT (mode, x, GEN_INT (start)); I think this should just use simplify_shift_const. gen_rtx_FOO should be avoided. Bernd
On Thu, Dec 10, 2015 at 05:05:12PM +0100, Bernd Schmidt wrote: > On 12/10/2015 03:36 PM, Kyrill Tkachov wrote: > >I'm okay with delaying this for next stage 1 if people prefer, though I > >think it's > >pretty low risk. > > I think this is something we should fix now. I agree. > >+ x = XEXP (x, 0); > >+ if (start > 0) > >+ x = gen_rtx_LSHIFTRT (mode, x, GEN_INT (start)); > > I think this should just use simplify_shift_const. gen_rtx_FOO should be > avoided. A lot of combine does that, it really is stuck in the 80's. I wouldn't use simplify_shift_const here, but simply simplify_gen_binary. The patch is okay with or without that change. Segher
diff --git a/gcc/combine.c b/gcc/combine.c index 7d4ffbcc766113c0af1c903f3d0dadbe74dec7fa..2628e1a437c2cd63d439a3ad28d1799b8c679be3 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -11037,7 +11037,9 @@ change_zero_ext (rtx *src) if (BITS_BIG_ENDIAN) start = GET_MODE_PRECISION (mode) - size - start; - x = gen_rtx_LSHIFTRT (mode, XEXP (x, 0), GEN_INT (start)); + x = XEXP (x, 0); + if (start > 0) + x = gen_rtx_LSHIFTRT (mode, x, GEN_INT (start)); } else if (GET_CODE (x) == ZERO_EXTEND && GET_CODE (XEXP (x, 0)) == SUBREG