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[58.6.183.210]) by smtp.googlemail.com with ESMTPSA id w3sm18676477pdl.45.2015.07.19.20.17.57 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 19 Jul 2015 20:17:58 -0700 (PDT) Message-ID: <55AC685A.8080906@linaro.org> Date: Mon, 20 Jul 2015 13:17:46 +1000 From: Kugan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Jeff Law , Maxim Kuvyrkov CC: "gcc-patches@gcc.gnu.org" Subject: Re: [PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT References: <558FD9D5.9070703@linaro.org> <558FDA78.9030606@linaro.org> <559212EF.7080301@linaro.org> <44190061-8CD0-417F-8592-23EC3C0BB9A3@linaro.org> <5599BAE4.80103@linaro.org> <559AEF4C.6060506@redhat.com> In-Reply-To: <559AEF4C.6060506@redhat.com> X-IsSubscribed: yes I have made a mistake while addressing the review comments for this patch. Unfortunately, It was not detected in my earlier testing. My sincere graphology for the mistake. I have basically missed the STRICT_LOW_PART check for the first if-check thus the second part (which is the ZERO_EXTRACT part) will never get executed. Attached patch fixes this along with some minor changes. Bootstrapped and regression tested on arm-none-linux (Chromebook) and x86-64-linux-gnu with no new regression along with the ARM ennoblement patch. Also did a complete arm qemu regression testing with Chriophe's scripts with no new regression. (http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/225987-reg4/report-build-info.html) Is this OK for trunk, Thanks, Kugan gcc/ChangeLog: 2015-07-20 Kugan Vivekanandarajah * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor clean up. diff --git a/gcc/cse.c b/gcc/cse.c index 1c14d83..96adf18 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -4529,10 +4529,10 @@ cse_insn (rtx_insn *insn) this case, and if it isn't set, then there will be no equivalence for the destination. */ if (n_sets == 1 && REG_NOTES (insn) != 0 - && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) + && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 + && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))) { - if ((! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) - || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART) + if (GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART) src_eqv = copy_rtx (XEXP (tem, 0)); /* If DEST is of the form ZERO_EXTACT, as in: @@ -4544,14 +4544,14 @@ cse_insn (rtx_insn *insn) point. Note that this is different from SRC_EQV. We can however calculate SRC_EQV with the position and width of ZERO_EXTRACT. */ else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT - && CONST_INT_P (src_eqv) + && CONST_INT_P (XEXP (tem, 0)) && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1)) && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2))) { rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0); rtx width = XEXP (SET_DEST (sets[0].rtl), 1); rtx pos = XEXP (SET_DEST (sets[0].rtl), 2); - HOST_WIDE_INT val = INTVAL (src_eqv); + HOST_WIDE_INT val = INTVAL (XEXP (tem, 0)); HOST_WIDE_INT mask; unsigned int shift; if (BITS_BIG_ENDIAN)