From patchwork Tue Jul 7 12:34:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 492169 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3D5601402C3 for ; Tue, 7 Jul 2015 22:35:03 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=wNV6r1QD; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:in-reply-to :content-type; q=dns; s=default; b=q2Eu5FT1McmGhIryLSubxe+A/dsrR +Phj26EaEJiTHp5XatBnNVehgC3bFgXL0or1951sEohVujXJQanzqHQddxPZLyzL VhnRc+fD/7SCvno7/FD7C00Zxya7RWan+oJv2e2aOiZovlk8ZOCVGc8yUdT1VwxL LjvLrRUjoGBtLQ= DKIM-Signature: v=1; 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Tue, 07 Jul 2015 12:34:51 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-37-oHKd3Lw8Q-unxArUIQaUeA-1 Received: from [10.2.207.65] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 7 Jul 2015 13:34:45 +0100 Message-ID: <559BC765.1090702@arm.com> Date: Tue, 07 Jul 2015 13:34:45 +0100 From: Alan Lawrence User-Agent: Thunderbird 2.0.0.24 (X11/20101213) MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH 4/16][ARM] Add float16x8_t type In-Reply-To: <559BC6EC.3000907@arm.com> X-MC-Unique: oHKd3Lw8Q-unxArUIQaUeA-1 X-IsSubscribed: yes Unchanged since https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01336.html commit b9ccac6243415b304024443b74bdc97b3a5954f2 Author: Alan Lawrence Date: Mon Dec 8 18:40:24 2014 +0000 Add float16x8_t + V8HFmode support (regardless of -mfp16-format) diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 89b1b0c..17e39d8 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -192,6 +192,7 @@ arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] #define di_UP DImode #define v16qi_UP V16QImode #define v8hi_UP V8HImode +#define v8hf_UP V8HFmode #define v4si_UP V4SImode #define v4sf_UP V4SFmode #define v2di_UP V2DImode @@ -827,6 +828,7 @@ arm_init_simd_builtin_types (void) /* Continue with standard types. */ arm_simd_types[Float16x4_t].eltype = arm_simd_floatHF_type_node; arm_simd_types[Float32x2_t].eltype = float_type_node; + arm_simd_types[Float16x8_t].eltype = arm_simd_floatHF_type_node; arm_simd_types[Float32x4_t].eltype = float_type_node; for (i = 0; i < nelts; i++) diff --git a/gcc/config/arm/arm-simd-builtin-types.def b/gcc/config/arm/arm-simd-builtin-types.def index bcbd20b..b178ae6 100644 --- a/gcc/config/arm/arm-simd-builtin-types.def +++ b/gcc/config/arm/arm-simd-builtin-types.def @@ -44,5 +44,7 @@ ENTRY (Float16x4_t, V4HF, none, 64, float16, 18) ENTRY (Float32x2_t, V2SF, none, 64, float32, 18) + + ENTRY (Float16x8_t, V8HF, none, 128, float16, 19) ENTRY (Float32x4_t, V4SF, none, 128, float32, 19) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6e074ea..0faa46c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -26251,7 +26251,8 @@ arm_vector_mode_supported_p (machine_mode mode) { /* Neon also supports V2SImode, etc. listed in the clause below. */ if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode - || mode == V4HFmode || mode == V16QImode || mode == V4SFmode || mode == V2DImode)) + || mode ==V4HFmode || mode == V16QImode || mode == V4SFmode + || mode == V2DImode || mode == V8HFmode)) return true; if ((TARGET_NEON || TARGET_IWMMXT) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 373dc85..c0a83b2 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -999,7 +999,7 @@ extern int arm_arch_crc; /* Modes valid for Neon Q registers. */ #define VALID_NEON_QREG_MODE(MODE) \ ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \ - || (MODE) == V4SFmode || (MODE) == V2DImode) + || (MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DImode) /* Structure modes valid for Neon registers. */ #define VALID_NEON_STRUCT_MODE(MODE) \ diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index b4100c8..a958f63 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -58,6 +58,7 @@ typedef __simd128_int8_t int8x16_t; typedef __simd128_int16_t int16x8_t; typedef __simd128_int32_t int32x4_t; typedef __simd128_int64_t int64x2_t; +typedef __simd128_float16_t float16x8_t; typedef __simd128_float32_t float32x4_t; typedef __simd128_poly8_t poly8x16_t; typedef __simd128_poly16_t poly16x8_t;