From patchwork Wed Apr 15 23:00:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kugan Vivekanandarajah X-Patchwork-Id: 461678 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CC082140142 for ; Thu, 16 Apr 2015 09:01:04 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=Fw5Cnp7+; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=M/nBvxgilk12BWN8X 9OiU8Br8smUpfPkn6Acy4Z4VdDN2+T6dey3rWHhtCty1D2NJjYByScOXrytLza1L hR4WcyLRq74idWd52KCaSqU/C+MskvU1hTl83ySDGeolt875xcpkLj83IuC0czkl xqbaJqnQ7BzYVtaolWFV9h2kdA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=Sd+XQK31ORLKj8YIyEBXWjb 0gL4=; b=Fw5Cnp7+azJXj9/hTtwcFkDsfaYkAZHr+Ci/Peo7S7Hcrw9d5mWymna IVecffh1JEKHyxoPI7WeyPWWTzGNQdDRalDQPAcBMcTjLzO9AtcM60YmYRcZJyZ2 t7CrkJYbuVXZDnw6KYzkspcOz2Ld6U7UfrHxffJKbThfyUM5stf4= Received: (qmail 60799 invoked by alias); 15 Apr 2015 23:00:57 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 60790 invoked by uid 89); 15 Apr 2015 23:00:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f180.google.com Received: from mail-pd0-f180.google.com (HELO mail-pd0-f180.google.com) (209.85.192.180) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 15 Apr 2015 23:00:54 +0000 Received: by pdea3 with SMTP id a3so68637958pde.3 for ; Wed, 15 Apr 2015 16:00:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:message-id:date:from:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type; bh=3ln3ZIsSRw94NX/ofn40BIkvRjxhyni9Q9qvPasat/w=; b=KzFt5x/HEL8ygJBi0ZwwX/LD6CHr15Npt75uEKjQZ90Ufv6UHU1zlcZ8NuSZ/CApol MqD1Ld65eM1i/Hf0eSY9LdUWQls1Hup25SNcDGjDXL9Q+4gVA+KAuku72LWrp8MtcZ/K Cii81UQrselgDK1vmzeuJrFwAbGsrsci40NxaGYCoerE9tC7BHPXtFXckh148zFIfa2M +JPYtyRiiX6bfnRlfvBtUGyqRwmN/AANJ7xCVP8xgZaRQZ0G5rO17U1T//pGWt0ldq5A j3AmXuHV1X5ScJCb6KMKf1oTJ/jPHIu503BxfFirqQ9KQ3+O7SEfhqM+8GC+rYt+rtrQ 0l0w== X-Gm-Message-State: ALoCoQkgzjM0M/HG5RMTPuQLBwa9TK6retbcIJhF+CZreLuySVyWSQw4oAfhUBkX+D6xVcUHx+W1 X-Received: by 10.68.65.41 with SMTP id u9mr50151458pbs.155.1429138852733; Wed, 15 Apr 2015 16:00:52 -0700 (PDT) Received: from [10.1.1.5] (58-6-183-210.dyn.iinet.net.au. [58.6.183.210]) by mx.google.com with ESMTPSA id ax2sm5167244pac.21.2015.04.15.16.00.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Apr 2015 16:00:52 -0700 (PDT) Message-ID: <552EED9F.3060901@linaro.org> Date: Thu, 16 Apr 2015 09:00:47 +1000 From: Kugan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Jakub Jelinek CC: Richard Earnshaw , "gcc-patches@gcc.gnu.org" , Marcus Shawcroft , James Greenhalgh , Maxim Kuvyrkov Subject: Re: [AArch64][PR65139] use clobber with match_scratch for aarch64_lshr_sisd_or_int_3 References: <552D897C.2040207@linaro.org> <552E571C.3000306@foss.arm.com> <20150415123202.GW1725@tucnak.redhat.com> <552EE5CC.9040703@linaro.org> <20150415223248.GZ1725@tucnak.redhat.com> In-Reply-To: <20150415223248.GZ1725@tucnak.redhat.com> X-IsSubscribed: yes On 16/04/15 08:32, Jakub Jelinek wrote: > On Thu, Apr 16, 2015 at 08:27:24AM +1000, Kugan wrote: >> + if ( == LSHIFTRT) >> + { >> + emit_insn (gen_aarch64_lshr_sisd_or_int_3 (operands[0], operands[1], operands[2])); > > That is way too long line, please wrap it. > >> + DONE; >> + } >> } >> ) >> >> @@ -3361,11 +3367,12 @@ >> ) >> >> ;; Logical right shift using SISD or Integer instruction >> -(define_insn "*aarch64_lshr_sisd_or_int_3" >> - [(set (match_operand:GPI 0 "register_operand" "=w,&w,r") >> +(define_insn "aarch64_lshr_sisd_or_int_3" >> + [(set (match_operand:GPI 0 "register_operand" "=w,w,r") >> (lshiftrt:GPI >> (match_operand:GPI 1 "register_operand" "w,w,r") >> - (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "Us,w,rUs")))] >> + (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "Us,w,rUs"))) > > Though, this one too... > Fixed in the attached patch. Thanks, Kugan diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 534a862..72a9f05 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3277,6 +3277,14 @@ DONE; } } + + if ( == LSHIFTRT) + { + emit_insn (gen_aarch64_lshr_sisd_or_int_3 (operands[0], + operands[1], + operands[2])); + DONE; + } } ) @@ -3361,11 +3369,13 @@ ) ;; Logical right shift using SISD or Integer instruction -(define_insn "*aarch64_lshr_sisd_or_int_3" - [(set (match_operand:GPI 0 "register_operand" "=w,&w,r") +(define_insn "aarch64_lshr_sisd_or_int_3" + [(set (match_operand:GPI 0 "register_operand" "=w,w,r") (lshiftrt:GPI (match_operand:GPI 1 "register_operand" "w,w,r") - (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "Us,w,rUs")))] + (match_operand:QI 2 "aarch64_reg_or_shift_imm_" + "Us,w,rUs"))) + (clobber (match_scratch:QI 3 "=X,w,X"))] "" "@ ushr\t%0, %1, %2 @@ -3379,30 +3389,28 @@ [(set (match_operand:DI 0 "aarch64_simd_register") (lshiftrt:DI (match_operand:DI 1 "aarch64_simd_register") - (match_operand:QI 2 "aarch64_simd_register")))] + (match_operand:QI 2 "aarch64_simd_register"))) + (clobber (match_scratch:QI 3))] "TARGET_SIMD && reload_completed" [(set (match_dup 3) (unspec:QI [(match_dup 2)] UNSPEC_SISD_NEG)) (set (match_dup 0) (unspec:DI [(match_dup 1) (match_dup 3)] UNSPEC_SISD_USHL))] - { - operands[3] = gen_lowpart (QImode, operands[0]); - } + "" ) (define_split [(set (match_operand:SI 0 "aarch64_simd_register") (lshiftrt:SI (match_operand:SI 1 "aarch64_simd_register") - (match_operand:QI 2 "aarch64_simd_register")))] + (match_operand:QI 2 "aarch64_simd_register"))) + (clobber (match_scratch:QI 3))] "TARGET_SIMD && reload_completed" [(set (match_dup 3) (unspec:QI [(match_dup 2)] UNSPEC_SISD_NEG)) (set (match_dup 0) (unspec:SI [(match_dup 1) (match_dup 3)] UNSPEC_USHL_2S))] - { - operands[3] = gen_lowpart (QImode, operands[0]); - } + "" ) ;; Arithmetic right shift using SISD or Integer instruction