From patchwork Wed Apr 15 07:48:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kugan Vivekanandarajah X-Patchwork-Id: 461371 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1543414010F for ; Wed, 15 Apr 2015 17:48:42 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=gPFLfucK; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=fuJnLes6BNm1w9z2+HpLKkdQxPuMLDgnqXHpN5SugGg AdfS138ItuwRXs4A8YvwHureCGr0vWaO09LkfNkmAHWbCT2Pw9Ow2RgTk3IXb6YF rlBhOrGK/BAATAch4d44D9BYCYr6V8m85d1Pl0EEV9ixl4wY6L0aTi7a2hLjf97U = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=n7nml3NP8lkEX0MMxarlRpawzpA=; b=gPFLfucKxAAJo2CLq d/r8EhU9XHYDdi6YNjji3F9QzTlguPKQty62F0ukM1ZBf4JZQy+dqKQ6o+Sn6Xre dXWQYNV608+v27jslM7IS45w9rRnqsOQHOJDtYW/xWssY1cUnD92bj/+CBDHf/Pw bQjB4wekoakn1Eikj8wPJokpCE= Received: (qmail 113490 invoked by alias); 15 Apr 2015 07:48:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 113474 invoked by uid 89); 15 Apr 2015 07:48:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f182.google.com Received: from mail-pd0-f182.google.com (HELO mail-pd0-f182.google.com) (209.85.192.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 15 Apr 2015 07:48:30 +0000 Received: by pdea3 with SMTP id a3so42854294pde.3 for ; Wed, 15 Apr 2015 00:48:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:message-id:date:from:user-agent:mime-version:to :cc:subject:content-type; bh=+VWaS0QirvWq7VnXlZEQpbdRciXnUykBil/9z1u9o7c=; b=KAuOO7HbMZtniSHQkgerhwi7ut8q67m9jOmY1r6adpc41+5AoMcrZbn30ez37StnSG PGvmzqc3iwomQq5LVhdn3rW9RKtylcswhNvgQ+5UgPJOm6Wpop+uSZ0EXAH9Mkcq3sxc A59067XAtckZ8tzs8xU+Vf8bX+I+SqcdKx5EFCoodXBltxq1oJgBuQjQsJ3p5rgLny95 A+5FrN8jyjh1FsG9+wGhWIhaMo562KwaZ8615fo3Wty/8xhA/h7PzufRMWcVXFlP7f1c V8gkPYRbdy9ZsmC6whMEmdTkUSaGhVPdBicst+de7yzg1gN+fTEZNKOiQhXACY5RKHD+ DLQg== X-Gm-Message-State: ALoCoQnq85ETRbz46gZV8WfYqAxgK19CEVYJZco2moOIPKsGAdZHG6IC4JzFgZPm4A7HntGRwm3H X-Received: by 10.70.65.39 with SMTP id u7mr43960286pds.11.1429084108483; Wed, 15 Apr 2015 00:48:28 -0700 (PDT) Received: from [10.1.1.5] (58-6-183-210.dyn.iinet.net.au. [58.6.183.210]) by mx.google.com with ESMTPSA id gy3sm3209906pbb.42.2015.04.15.00.48.25 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Apr 2015 00:48:27 -0700 (PDT) Message-ID: <552E17C7.80800@linaro.org> Date: Wed, 15 Apr 2015 17:48:23 +1000 From: Kugan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: Ramana Radhakrishnan , Richard Earnshaw , Kyrill Tkachov Subject: [ARM][PR65768] Keep constants in register when expanding X-IsSubscribed: yes As mentioned in PR65768, ARM gcc generates suboptimal code for constant Uses in loop. Part of the reason is that ARM back-end is splitting constants during expansion of RTL, making it hard for the RTL optimization passes to optimize it. Zhenqiang posted a patch at https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00325.html to fix this As mentioned in PR65768, I tried with few more test-cases and enhanced it. Regression tested on arm-none-linux-gnu and no new regressions. Is this OK for trunk? Thanks, Kugan gcc/ChangeLog: 2015-04-15 Kugan Vivekanandarajah Zhenqiang Chen PR target/65768 * config/arm/arm-protos.h (const_ok_for_split): New definition. * config/arm/arm.c (const_ok_for_split): New function. * config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3, movsi): Keep some large constants in register instead of splitting them. gcc/testsuite/ChangeLog: 2015-04-15 Kugan Vivekanandarajah Zhenqiang Chen PR target/65768 * gcc.target/arm/maskdata.c: New test. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 16eb854..1b131a9 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -58,6 +58,7 @@ extern bool arm_modes_tieable_p (machine_mode, machine_mode); extern int const_ok_for_arm (HOST_WIDE_INT); extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code); +extern int const_ok_for_split (HOST_WIDE_INT, enum rtx_code); extern int arm_split_constant (RTX_CODE, machine_mode, rtx, HOST_WIDE_INT, rtx, rtx, int); extern int legitimate_pic_operand_p (rtx); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 8fd1388..0c13666 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3745,6 +3745,41 @@ const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code) } } +/* Return true if I is a valid constant for split with the operation CODE. + The condition should align with the constrain of the corresponding + define_insn_and_split pattern to make sure later pass can optimize + the constants. */ +int +const_ok_for_split (HOST_WIDE_INT i, enum rtx_code code) +{ + if (optimize < 2 + || !can_create_pseudo_p () + || const_ok_for_arm (i) + /* Since expand pass always uses "sign-extend" to get the value + (trunc_int_for_mode called from immed_wide_int_const) for rtl, + and logs show most negative values are UNSIGNED when they are + TREE node. And combine pass is smart enough to recover the + negative value to positive value. */ + || ((i < 0) && const_ok_for_arm (-i))) + return 1; + + switch (code) + { + case AND: + /* zero_extendhi instruction is efficient. */ + return const_ok_for_arm (~i) || (i == 0xffff); + + case IOR: + return TARGET_THUMB2 && const_ok_for_arm (~i); + + case SET: + return const_ok_for_arm (i) || const_ok_for_arm (~i); + + default: + return 1; + } +} + /* Emit a sequence of insns to handle a large constant. CODE is the code of the operation required, it can be any of SET, PLUS, IOR, AND, XOR, MINUS; diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 164ac13..a169775 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1164,10 +1164,16 @@ { if (TARGET_32BIT) { - arm_split_constant (MINUS, SImode, NULL_RTX, - INTVAL (operands[1]), operands[0], - operands[2], optimize && can_create_pseudo_p ()); - DONE; + if (!const_ok_for_split (INTVAL (operands[1]), MINUS)) + operands[1] = force_reg (SImode, operands[1]); + else + { + arm_split_constant (MINUS, SImode, NULL_RTX, + INTVAL (operands[1]), operands[0], + operands[2], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ operands[1] = force_reg (SImode, operands[1]); @@ -2078,14 +2084,19 @@ operands[1] = convert_to_mode (QImode, operands[1], 1); emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0], operands[1])); + DONE; } + else if (!const_ok_for_split (INTVAL (operands[2]), AND)) + operands[2] = force_reg (SImode, operands[2]); else - arm_split_constant (AND, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], - operands[1], - optimize && can_create_pseudo_p ()); + { + arm_split_constant (AND, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); - DONE; + DONE; + } } } else /* TARGET_THUMB1 */ @@ -2884,10 +2895,16 @@ { if (TARGET_32BIT) { - arm_split_constant (IOR, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], operands[1], - optimize && can_create_pseudo_p ()); - DONE; + if (!const_ok_for_split (INTVAL (operands[2]), IOR)) + operands[2] = force_reg (SImode, operands[2]); + else + { + arm_split_constant (IOR, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ { @@ -3054,10 +3071,16 @@ { if (TARGET_32BIT) { - arm_split_constant (XOR, SImode, NULL_RTX, - INTVAL (operands[2]), operands[0], operands[1], - optimize && can_create_pseudo_p ()); - DONE; + if (!const_ok_for_split (INTVAL (operands[2]), XOR)) + operands[2] = force_reg (SImode, operands[2]); + else + { + arm_split_constant (XOR, SImode, NULL_RTX, + INTVAL (operands[2]), operands[0], + operands[1], + optimize && can_create_pseudo_p ()); + DONE; + } } else /* TARGET_THUMB1 */ { @@ -5554,10 +5577,18 @@ && !(const_ok_for_arm (INTVAL (operands[1])) || const_ok_for_arm (~INTVAL (operands[1])))) { - arm_split_constant (SET, SImode, NULL_RTX, - INTVAL (operands[1]), operands[0], NULL_RTX, - optimize && can_create_pseudo_p ()); - DONE; + if (!const_ok_for_split (INTVAL (operands[1]), SET)) + { + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); + DONE; + } + else + { + arm_split_constant (SET, SImode, NULL_RTX, + INTVAL (operands[1]), operands[0], NULL_RTX, + optimize && can_create_pseudo_p ()); + DONE; + } } } else /* TARGET_THUMB1... */ diff --git a/gcc/testsuite/gcc.target/arm/maskdata.c b/gcc/testsuite/gcc.target/arm/maskdata.c index e69de29..6d6bb39 100644 --- a/gcc/testsuite/gcc.target/arm/maskdata.c +++ b/gcc/testsuite/gcc.target/arm/maskdata.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options " -O2 -fno-gcse " } */ +/* { dg-require-effective-target arm_thumb2_ok } */ + +#define MASK 0xff00ff +void maskdata (int * data, int len) +{ + int i = len; + for (; i > 0; i -= 2) + { + data[i] &= MASK; + data[i + 1] &= MASK; + } +} +/* { dg-final { scan-assembler-not "65280" } } */