From patchwork Fri Jan 16 17:32:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 429949 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8FF97140111 for ; Sat, 17 Jan 2015 04:32:19 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; q=dns; s=default; b=B9mb6L9t/nKYkeq+8 rMcR8IYvsQGVWz/rKhxxn4iAnwwZmZZQ0mnNDyO44vihduSrR22RzMeW4JHFKpSX DxS/jwkBFfjr6jaEE5Bp1++7NSApoeIIAvpL6qu/iJQ7NZyCzcTCBA9iKo+ApdGZ 268fZB68hYcbQNfgOkAA/s07Eo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; s=default; bh=9rQThykfxJVGiUjIZk1Sb0r Hfgk=; b=mnEDvrfWix0sMP8CudN7IvjUF1IMs/AV6N49ubuiAfts1BtUXMUNMUI 557mu68K508durPJlMF71Z73HguBYFs3EdGDUDrBjoU2uLOyFdm2cy5EtDcUlgRq Cow3xISiN5PIlcrlTCeyjElh9uTCDoVguQaA1t20trNvheONrz3M= Received: (qmail 9064 invoked by alias); 16 Jan 2015 17:32:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 9052 invoked by uid 89); 16 Jan 2015 17:32:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 16 Jan 2015 17:32:10 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by service87.mimecast.com; Fri, 16 Jan 2015 17:32:07 +0000 Received: from [10.1.209.51] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 16 Jan 2015 17:32:07 +0000 Message-ID: <54B94B17.6020409@arm.com> Date: Fri, 16 Jan 2015 17:32:07 +0000 From: Alan Lawrence User-Agent: Thunderbird 2.0.0.24 (X11/20101213) MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH 2/4][ARM Intrinsics] Add missing float16x8_t type References: <54B948CB.3010906@arm.com> In-Reply-To: <54B948CB.3010906@arm.com> X-MC-Unique: 115011617320705101 X-IsSubscribed: yes This defines arm_neon.h's float16x8_t type, although no intrinsics yet (see next patch). Adding V8HFmode does mean programmers can define a GCC vector of same size themselves. gcc/ChangeLog: * config/arm/arm.h (VALID_NEON_QREG_MODE): Add V8HFmode. * config/arm/arm.c (arm_vector_mode_supported_p): Support V8HFmode. * config/arm/arm-builtins.c (v8hf_UP): New. (arm_init_simd_builtin_types): Initialise Float16x8_t. * config/arm/arm-simd-builtin-types.def (Float16x8_t): New. * config/arm/arm_neon.h (float16x8_t): New typedef. diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index baa83490fcd9bf68d9e9bdbd57cdf6f2d3d0e056..a91d656bad7b8250cc38237358fc1065acd47714 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -179,6 +179,7 @@ arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] #define di_UP DImode #define v16qi_UP V16QImode #define v8hi_UP V8HImode +#define v8hf_UP V8HFmode #define v4si_UP V4SImode #define v4sf_UP V4SFmode #define v2di_UP V2DImode @@ -814,6 +815,7 @@ arm_init_simd_builtin_types (void) /* Continue with standard types. */ arm_simd_types[Float16x4_t].eltype = arm_simd_floatHF_type_node; arm_simd_types[Float32x2_t].eltype = float_type_node; + arm_simd_types[Float16x8_t].eltype = arm_simd_floatHF_type_node; arm_simd_types[Float32x4_t].eltype = float_type_node; for (i = 0; i < nelts; i++) diff --git a/gcc/config/arm/arm-simd-builtin-types.def b/gcc/config/arm/arm-simd-builtin-types.def index 7360e268bf8507f975b3cff7c6078a046cde3954..c4cb0e2a32b47d13227999a319237895573f5766 100644 --- a/gcc/config/arm/arm-simd-builtin-types.def +++ b/gcc/config/arm/arm-simd-builtin-types.def @@ -44,5 +44,7 @@ ENTRY (Float16x4_t, V4HF, none, 64, float16, 18) ENTRY (Float32x2_t, V2SF, none, 64, float32, 18) + + ENTRY (Float16x8_t, V8HF, none, 128, float16, 19) ENTRY (Float32x4_t, V4SF, none, 128, float32, 19) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index d850982563eb35d9d87298473bc3dfcb0527ae0b..0059136ba46f6636fd7ac63e667161b8f77118b8 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1093,7 +1093,7 @@ extern int arm_arch_crc; /* Modes valid for Neon Q registers. */ #define VALID_NEON_QREG_MODE(MODE) \ ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \ - || (MODE) == V4SFmode || (MODE) == V2DImode) + || (MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DImode) /* Structure modes valid for Neon registers. */ #define VALID_NEON_STRUCT_MODE(MODE) \ diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6944c3f3867d2d8ff814a2302112207a56319454..a2fef7aee5f19e3d89524470de7d8615bd60b5a0 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -26184,7 +26184,8 @@ arm_vector_mode_supported_p (machine_mode mode) { /* Neon also supports V2SImode, etc. listed in the clause below. */ if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode - || mode == V4HFmode || mode == V16QImode || mode == V4SFmode || mode == V2DImode)) + || mode ==V4HFmode || mode == V16QImode || mode == V4SFmode + || mode == V2DImode || mode == V8HFmode)) return true; if ((TARGET_NEON || TARGET_IWMMXT) diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index 231d1392b93fe78a37f58595f775b0cc87fb709f..7259852a6a450c5f693b03cf6342f33190f266c6 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -58,6 +58,7 @@ typedef __simd128_int8_t int8x16_t; typedef __simd128_int16_t int16x8_t; typedef __simd128_int32_t int32x4_t; typedef __simd128_int64_t int64x2_t; +typedef __simd128_float16_t float16x8_t; typedef __simd128_float32_t float32x4_t; typedef __simd128_poly8_t poly8x16_t; typedef __simd128_poly16_t poly16x8_t;