| Message ID | 54B80C46.602@arm.com |
|---|---|
| State | New |
| Headers | show |
Richard, Thanks for catching this. Your change is optimal for X-Gene 1. —Phil. > On 15 Jan 2015, at 19:51, Richard Earnshaw <rearnsha@arm.com> wrote: > > The recent xgene tuning parameters merge broke the ARM bootstrap, since > the tables have been extended by an additional parameter giving: > > gcc/config/arm/arm.c:1932:1: error: missing initializer for member > 'tune_params::fuseable_ops' [-Werror=missing-field-initializers] > }; > ^ > > > Fixed as below. I've no idea if this is the optimial behaviour for > Xgene parts, but it preserves the previous behaviour of the compiler > before this pass was added. I'll let those who really know decide > whether a more comprehensive change is needed. > > R. > > 2015-01-15 Richard Earnshaw <rearnsha@arm.com> > > * arm.c (arm_xgene_tune): Add default initializer for instruction > fusion.<xgene.patch>
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a2cce8e..c106843 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1928,7 +1928,8 @@ const struct tune_params arm_xgene1_tune = false, /* Prefer Neon for 64-bits bitops. */ true, true, /* Prefer 32-bit encodings. */ false, /* Prefer Neon for stringops. */ - 32 /* Maximum insns to inline memset. */ + 32, /* Maximum insns to inline memset. */ + ARM_FUSE_NOTHING /* Fuseable pairs of instructions. */ }; /* Branches can be dual-issued on Cortex-A5, so conditional execution is