From patchwork Wed Nov 12 17:56:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 410071 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D017F1400E7 for ; Thu, 13 Nov 2014 04:57:14 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:in-reply-to :content-type; q=dns; s=default; b=cIEE2ys68KeO5CveCJbV7ZGZb6Wct NrWtXJNYPkJVilBME6oWHtLNiw/pJxQ7i4EzoEM/51qRYwlvLr4uMlfF8x9sq/K6 xyTfa+xaUfYsDwWJwecpXkyYZ13pXEi9jJuMiNproIX/88UTJjsk2d3/lH2ocnQI N5ubgBZGWm7l6Q= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:in-reply-to :content-type; s=default; bh=XT5XgGZ7uC9QsUuM9wSSqyhDTN4=; b=yV3 vXlwJOgyllhQ2ZeK0CpVcD2sHRwd3+YalUzOWR5+bWFXCvZX2prk5kwmABPB33aW ljtmf1k0DV0IaD2El+SjG6mjp87scix4SRDeAaJhnTAHIzJ35MRrrO3Lpus9aKLl 5DWI5da3o4cLMMqEaKl1kcU8ndFIjiVkeVYxD0XY= Received: (qmail 16448 invoked by alias); 12 Nov 2014 17:56:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16401 invoked by uid 89); 12 Nov 2014 17:56:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 12 Nov 2014 17:56:19 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 12 Nov 2014 17:56:16 +0000 Received: from [10.1.209.51] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 12 Nov 2014 17:56:16 +0000 Message-ID: <54639F40.5030309@arm.com> Date: Wed, 12 Nov 2014 17:56:16 +0000 From: Alan Lawrence User-Agent: Thunderbird 2.0.0.24 (X11/20101213) MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH 4/4][Vectorizer]Make reductions-via-shifts and vec_shr_optab endianness-neutral In-Reply-To: <54639D83.7090205@arm.com> X-MC-Unique: 114111217561607901 X-IsSubscribed: yes This redefines vec_shr optab to be the same (in terms of gcc vectors) regardless of target endianness. The vectorizer uses this to do reductions via shifts, so also change the vectorizer to shift things always the same way (from the midend's POV of vectors). cross-tested check-gcc on (1) aarch64-none-elf and (2) aarch64_be-none-elf, both (a) using the endianness-independent vec_shr patterns at https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01477.html and (b) in present state without any vec_shr patterns. No regressions on any combination. Bootstrap + check-gcc on x86_64-none-linux-gnu. This patch will break MIPS and PowerPC (which have bigendian vec_shr patterns). Candidate MIPS fix previously posted at https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01481.html . PowerPC should be fixed by https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01480.html ; I've bootstrapped this on powerpc64-unknown-linux-gnu, check-gcc in progress. gcc/ChangeLog: * optabs.c (shift_amt_for_vec_perm_mask): Remove code conditional on BYTES_BIG_ENDIAN. * tree-vect-loop.c (calc_vec_perm_mask_for_shift, vect_create_epilog_for_reduction): Likewise. * doc/md.texi (vec_shr_m): Clarify direction of shifting. diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 3b5511ec39a86fb4278ebd766420eaec5eb05d8b..3742ca3e3f1c428ae8a84885969b31806df02ebd 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -4798,7 +4798,7 @@ of a wider mode.) @cindex @code{vec_shr_@var{m}} instruction pattern @item @samp{vec_shr_@var{m}} -Whole vector right shift in bits. +Whole vector right shift in bits, i.e. towards element 0. Operand 1 is a vector to be shifted. Operand 2 is an integer shift amount in bits. Operand 0 is where the resulting shifted vector is stored. diff --git a/gcc/optabs.c b/gcc/optabs.c index 9650b58a8ed2c6701f653c0d6c15dba71b04b089..6e8f52e1d88844b060857356ac2ec8b7cba059c6 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -6626,8 +6626,6 @@ shift_amt_for_vec_perm_mask (rtx sel) return NULL_RTX; } - if (BYTES_BIG_ENDIAN) - first = (2 * nelt) - first; return GEN_INT (first * bitsize); } diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c index f1d327f42a5c517a01121135569dd014e49502e0..91d82b72d0f0ef944d0fa5c23da36aff0384a9d0 100644 --- a/gcc/tree-vect-loop.c +++ b/gcc/tree-vect-loop.c @@ -3091,7 +3091,7 @@ calc_vec_perm_mask_for_shift (enum machine_mode mode, unsigned int offset, unsigned int i, nelt = GET_MODE_NUNITS (mode); for (i = 0; i < nelt; i++) - sel[i] = (BYTES_BIG_ENDIAN ? i - offset : i + offset) & (2*nelt - 1); + sel[i] = (i + offset) & (2*nelt - 1); } /* Checks whether the target supports whole-vector shifts for vectors of mode @@ -3906,7 +3906,7 @@ vect_create_epilog_for_reduction (vec vect_defs, gimple stmt, gimple epilog_stmt = NULL; enum tree_code code = gimple_assign_rhs_code (stmt); gimple exit_phi; - tree bitsize, bitpos; + tree bitsize; tree adjustment_def = NULL; tree vec_initial_def = NULL; tree reduction_op, expr, def; @@ -4416,14 +4416,8 @@ vect_create_epilog_for_reduction (vec vect_defs, gimple stmt, dump_printf_loc (MSG_NOTE, vect_location, "extract scalar result\n"); - if (BYTES_BIG_ENDIAN) - bitpos = size_binop (MULT_EXPR, - bitsize_int (TYPE_VECTOR_SUBPARTS (vectype) - 1), - TYPE_SIZE (scalar_type)); - else - bitpos = bitsize_zero_node; - - rhs = build3 (BIT_FIELD_REF, scalar_type, new_temp, bitsize, bitpos); + rhs = build3 (BIT_FIELD_REF, scalar_type, + new_temp, bitsize, bitsize_zero_node); epilog_stmt = gimple_build_assign (new_scalar_dest, rhs); new_temp = make_ssa_name (new_scalar_dest, epilog_stmt); gimple_assign_set_lhs (epilog_stmt, new_temp);