From patchwork Mon Oct 20 14:20:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 401145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CD83B14007D for ; Tue, 21 Oct 2014 01:22:13 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; q=dns; s=default; b=QzG5H5NPCw/yvHJVa eXixC+MLDY0OJ9IccZBZz0yHIg5etKJqW/dvRegTMyzeZmPyB8a66+UZfad9t8CC GX6doGfW2RHshBPGSfmroYqtI9SuNzSYvqNXLriijFuODnMrbL3OzC4eea5XUnQh wb04Hl5Yik9HWqLMJJaifClFsA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; s=default; bh=6pm9YV8+7eOmVOTK64PHbGK mdIM=; b=E1CzVpG/OnMZR3zuvBCAlTFZwrUuolSPJ7fGyn5NIeB0+3FsNHpjG9N IlAA4VTC3WR5PNynuxOi4bGi4YBYfAEfSr/SeJL9H6/0KYLj6wAYsyXV/I17zjVU Lx0/QygmEulrgxhhqiczGVE8FWP+NXWTvHrUf4W01iN1KzWpynx0= Received: (qmail 19504 invoked by alias); 20 Oct 2014 14:22:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19489 invoked by uid 89); 20 Oct 2014 14:22:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 20 Oct 2014 14:21:55 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-03.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1XgDqJ-0003Ur-Lv from Bernd_Schmidt@mentor.com for gcc-patches@gcc.gnu.org; Mon, 20 Oct 2014 07:21:52 -0700 Received: from [127.0.0.1] (137.202.0.76) by SVR-IES-FEM-03.mgc.mentorg.com (137.202.0.108) with Microsoft SMTP Server id 14.3.181.6; Mon, 20 Oct 2014 15:21:50 +0100 Message-ID: <54451A34.8000401@codesourcery.com> Date: Mon, 20 Oct 2014 16:20:36 +0200 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.8.0 MIME-Version: 1.0 To: GCC Patches Subject: The nvptx port [2/11+] No register allocation References: <54451994.9070209@codesourcery.com> In-Reply-To: <54451994.9070209@codesourcery.com> Since it's a virtual target, I've chosen not to run register allocation. This is one of the patches necessary to make that work, it primarily adds a target hook to disable it and fixes some of the fallout. Bernd gcc/ * target.def (no_register_allocation): New data hook. * doc/tm.texi.in: Add @hook TARGET_NO_REGISTER_ALLOCATION. * doc/tm.texi: Regenerate. * ira.c (gate_ira): New function. (pass_data_ira): Set has_gate. (pass_ira): Add a gate function. (pass_data_reload): Likewise. (pass_reload): Add a gate function. (pass_ira): Use it. * reload1.c (eliminate_regs): If reg_eliminte_is NULL, assert that no register allocation happens on the target and return. * final.c (alter_subreg): Ensure register is not a pseudo before calling simplify_subreg. (output_operand): Assert that x isn't a pseudo only if doing register allocation. ------------------------------------------------------------------------ Index: gcc/doc/tm.texi =================================================================== --- gcc/doc/tm.texi.orig +++ gcc/doc/tm.texi @@ -9520,11 +9520,19 @@ True if the @code{DW_AT_comp_dir} attrib @end deftypevr @deftypevr {Target Hook} bool TARGET_DELAY_SCHED2 -True if sched2 is not to be run at its normal place. This usually means it will be run as part of machine-specific reorg. +True if sched2 is not to be run at its normal place. +This usually means it will be run as part of machine-specific reorg. @end deftypevr @deftypevr {Target Hook} bool TARGET_DELAY_VARTRACK -True if vartrack is not to be run at its normal place. This usually means it will be run as part of machine-specific reorg. +True if vartrack is not to be run at its normal place. +This usually means it will be run as part of machine-specific reorg. +@end deftypevr + +@deftypevr {Target Hook} bool TARGET_NO_REGISTER_ALLOCATION +True if register allocation and the passes +following it should not be run. Usually true only for virtual assembler +targets. @end deftypevr @defmac ASM_OUTPUT_DWARF_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2}) Index: gcc/doc/tm.texi.in =================================================================== --- gcc/doc/tm.texi.in.orig +++ gcc/doc/tm.texi.in @@ -7188,6 +7188,8 @@ tables, and hence is desirable if it wor @hook TARGET_DELAY_VARTRACK +@hook TARGET_NO_REGISTER_ALLOCATION + @defmac ASM_OUTPUT_DWARF_DELTA (@var{stream}, @var{size}, @var{label1}, @var{label2}) A C statement to issue assembly directives that create a difference @var{lab1} minus @var{lab2}, using an integer of the given @var{size}. Index: gcc/target.def =================================================================== --- gcc/target.def.orig +++ gcc/target.def @@ -5379,15 +5379,21 @@ DEFHOOKPOD bool, false) DEFHOOKPOD -(delay_sched2, "True if sched2 is not to be run at its normal place. \ +(delay_sched2, "True if sched2 is not to be run at its normal place.\n\ This usually means it will be run as part of machine-specific reorg.", bool, false) DEFHOOKPOD -(delay_vartrack, "True if vartrack is not to be run at its normal place. \ +(delay_vartrack, "True if vartrack is not to be run at its normal place.\n\ This usually means it will be run as part of machine-specific reorg.", bool, false) +DEFHOOKPOD +(no_register_allocation, "True if register allocation and the passes\n\ +following it should not be run. Usually true only for virtual assembler\n\ +targets.", +bool, false) + /* Leave the boolean fields at the end. */ /* Close the 'struct gcc_target' definition. */ Index: gcc/final.c =================================================================== --- gcc/final.c.orig +++ gcc/final.c @@ -3129,7 +3129,7 @@ alter_subreg (rtx *xp, bool final_p) else *xp = adjust_address_nv (y, GET_MODE (x), offset); } - else + else if (REG_P (y) && HARD_REGISTER_P (y)) { rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), SUBREG_BYTE (x)); @@ -3816,7 +3816,8 @@ output_operand (rtx x, int code ATTRIBUT x = alter_subreg (&x, true); /* X must not be a pseudo reg. */ - gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); + if (!targetm.no_register_allocation) + gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); targetm.asm_out.print_operand (asm_out_file, x, code); Index: gcc/reload1.c =================================================================== --- gcc/reload1.c.orig +++ gcc/reload1.c @@ -2947,6 +2947,11 @@ eliminate_regs_1 (rtx x, enum machine_mo rtx eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) { + if (reg_eliminate == NULL) + { + gcc_assert (targetm.no_register_allocation); + return x; + } return eliminate_regs_1 (x, mem_mode, insn, false, false); } Index: gcc/ira.c =================================================================== --- gcc/ira.c.orig +++ gcc/ira.c @@ -5573,6 +5573,10 @@ public: {} /* opt_pass methods: */ + virtual bool gate (function *) + { + return !targetm.no_register_allocation; + } virtual unsigned int execute (function *) { ira (dump_file); @@ -5613,6 +5617,10 @@ public: {} /* opt_pass methods: */ + virtual bool gate (function *) + { + return !targetm.no_register_allocation; + } virtual unsigned int execute (function *) { do_reload ();