From patchwork Thu Oct 9 02:21:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Law X-Patchwork-Id: 397901 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0712D1400D2 for ; Thu, 9 Oct 2014 13:21:59 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; q=dns; s=default; b=HwFes5+H2phPmt4Uy Yhl0/Meqegm+nQ4vyEUKhBbfV/NKeQmEnGNQIU0p7Y7YT67z5PveCTmqfI5brNyg wvmdVGJ8gjrkOCO+sawO/w7QtjbLaW7S+5ozaMGJRl9k8q+lDHKq8cgD4UbRCLkC j/a8V6Fb6Pq5MsCGFkeIRKFQ1Q= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; s=default; bh=+7ahxhq79YBrniIjl/fNB/Y zMe4=; b=NfczOTLxGCMrPL7zENHqikFZ1LE2zm+dyUD1Slq0YMR3UgSbr82WcqX XOs6IWXMFnIsiI8fgOx2Z4EnjyRp56W8y5akLsIM9eZZ5L1VEg8aqPLZYWYt7GSx hAW7TGANrpq79nhgza4C/5be0yLAm7Qgf77X9RgIpnZtXP5Abm70= Received: (qmail 14747 invoked by alias); 9 Oct 2014 02:21:51 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14738 invoked by uid 89); 9 Oct 2014 02:21:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_HELO_PASS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 09 Oct 2014 02:21:49 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s992Lm5U008818 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Wed, 8 Oct 2014 22:21:48 -0400 Received: from stumpy.slc.redhat.com ([10.3.113.8]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s992Ll0g031760 for ; Wed, 8 Oct 2014 22:21:48 -0400 Message-ID: <5435F13B.9050108@redhat.com> Date: Wed, 08 Oct 2014 20:21:47 -0600 From: Jeff Law User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.1 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: Re: RFA: RTL typesafety improvements for ira.c References: <542C8168.4030409@redhat.com> <1412206034.16438.89.camel@surprise> In-Reply-To: <1412206034.16438.89.camel@surprise> X-IsSubscribed: yes On 10/01/14 17:27, David Malcolm wrote: > > FWIW, presumably "insn" here also can now be an rtx_insn *? > > (I'd like to eventually strengthen the params to the note-handling > functions, so fixing this up now would help with that). Here's the updated patch to include strengthening insn to rtx_insn *. Bootstrapped and regression tested on x86_64-unknown-linux-gnu. OK for the trunk? I'd like to get this wrapped up so that a patch in the same area from Felix can get rebased and move forward. Jeff * ira.c (struct equivalence): Promote INIT_INSNs field to an rtx_insn_list. Add comments. (no_equiv): Promote LIST to an rtx_insn_list. Update testing for and creating the special marker. Use methods to extract the insn and next pointers. Promote INSN to an rtx_insn. (update_equiv_regs): Update test for special marker in the INIT_INSNs list. diff --git a/gcc/ira.c b/gcc/ira.c index ad0e463..d057ea6 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -2890,8 +2890,16 @@ struct equivalence e.g. by reload. */ rtx replacement; rtx *src_p; - /* The list of each instruction which initializes this register. */ - rtx init_insns; + + /* The list of each instruction which initializes this register. + + NULL indicates we know nothing about this register's equivalence + properties. + + An INSN_LIST with a NULL insn indicates this pseudo is already + known to not have a valid equivalence. */ + rtx_insn_list *init_insns; + /* Loop depth is used to recognize equivalences which appear to be present within the same loop (or in an inner loop). */ int loop_depth; @@ -3242,15 +3250,15 @@ no_equiv (rtx reg, const_rtx store ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED) { int regno; - rtx list; + rtx_insn_list *list; if (!REG_P (reg)) return; regno = REGNO (reg); list = reg_equiv[regno].init_insns; - if (list == const0_rtx) + if (list && list->insn () == NULL) return; - reg_equiv[regno].init_insns = const0_rtx; + reg_equiv[regno].init_insns = gen_rtx_INSN_LIST (VOIDmode, NULL_RTX, NULL); reg_equiv[regno].replacement = NULL_RTX; /* This doesn't matter for equivalences made for argument registers, we should keep their initialization insns. */ @@ -3258,9 +3266,9 @@ no_equiv (rtx reg, const_rtx store ATTRIBUTE_UNUSED, return; ira_reg_equiv[regno].defined_p = false; ira_reg_equiv[regno].init_insns = NULL; - for (; list; list = XEXP (list, 1)) + for (; list; list = list->next ()) { - rtx insn = XEXP (list, 0); + rtx_insn *insn = list->insn (); remove_note (insn, find_reg_note (insn, REG_EQUIV, NULL_RTX)); } } @@ -3437,7 +3445,8 @@ update_equiv_regs (void) if (!REG_P (dest) || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER - || reg_equiv[regno].init_insns == const0_rtx + || (reg_equiv[regno].init_insns + && reg_equiv[regno].init_insns->insn () == NULL) || (targetm.class_likely_spilled_p (reg_preferred_class (regno)) && MEM_P (src) && ! reg_equiv[regno].is_arg_equivalence)) { @@ -3608,8 +3617,8 @@ update_equiv_regs (void) && (regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER && REG_BASIC_BLOCK (regno) >= NUM_FIXED_BLOCKS && DF_REG_DEF_COUNT (regno) == 1 - && reg_equiv[regno].init_insns != 0 - && reg_equiv[regno].init_insns != const0_rtx + && reg_equiv[regno].init_insns != NULL + && reg_equiv[regno].init_insns->insn () != NULL && ! find_reg_note (XEXP (reg_equiv[regno].init_insns, 0), REG_EQUIV, NULL_RTX) && ! contains_replace_regs (XEXP (dest, 0)) @@ -3728,7 +3737,7 @@ update_equiv_regs (void) delete_insn (equiv_insn); reg_equiv[regno].init_insns - = XEXP (reg_equiv[regno].init_insns, 1); + = reg_equiv[regno].init_insns->next (); ira_reg_equiv[regno].init_insns = NULL; bitmap_set_bit (cleared_regs, regno);