From patchwork Fri Jun 20 18:58:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 362319 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 74052140086 for ; Sat, 21 Jun 2014 04:58:23 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=EwcQbvsr6v+7Njd0l SPLWIvmGOaOcepYTzpTwWdTyu8oEpUm3Vwa0d11Jyla9uF0MtSmGTJDGV/iISvV1 o2WxlVH+I6JJi/+PuKs8hulUoIBnXe6amn7HLz4X4ie/WIodNiwqj44VBbYqobIE MM5Se5Z7dM9alN2wK8acJJmjLk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=5fQrRpspwN5Ujx9pb5gAsdC Jk38=; b=CcGE8tRDpS3Y/DTFK7dVyMAemTEvq+2TbzXUQcutvFAiSrqTI9+26Lv hyCJAI9Gm+OBN97AAfM2ib9M9UzxO0QAcx5cM5gGlynp9t3pxWBMP8iafY0HOm7G BmIkLZ+ZX9wjOtbB94+e2qOUjK8KNl84PtOPLd+irazZ4kSSVZlo= Received: (qmail 14735 invoked by alias); 20 Jun 2014 18:58:16 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 14719 invoked by uid 89); 20 Jun 2014 18:58:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00 autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 Jun 2014 18:58:11 +0000 Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1Wy40k-000428-E9 from Tom_deVries@mentor.com ; Fri, 20 Jun 2014 11:58:06 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Fri, 20 Jun 2014 11:58:06 -0700 Received: from [127.0.0.1] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.2.247.3; Fri, 20 Jun 2014 19:58:03 +0100 Message-ID: <53A48438.6090101@mentor.com> Date: Fri, 20 Jun 2014 20:58:00 +0200 From: Tom de Vries User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Richard Henderson CC: Richard Earnshaw , GCC Patches Subject: Re: [PATCH, AARCH64] Enable fuse-caller-save for AARCH64 References: <538AF9C7.7040408@mentor.com> <53A25E9D.1050005@redhat.com> <53A32B08.8040106@mentor.com> <53A32EEB.4010805@redhat.com> In-Reply-To: <53A32EEB.4010805@redhat.com> On 19-06-14 20:41, Richard Henderson wrote: > On 06/19/2014 11:25 AM, Tom de Vries wrote: >> On 19-06-14 05:53, Richard Henderson wrote: >>> On 06/01/2014 03:00 AM, Tom de Vries wrote: >>>>> +aarch64_emit_call_insn (rtx pat) >>>>> +{ >>>>> + rtx insn = emit_call_insn (pat); >>>>> + >>>>> + rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn); >>>>> + clobber_reg (fusage, gen_rtx_REG (word_mode, IP0_REGNUM)); >>>>> + clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM)); >>> Actually, I'd like to know more about how this is supposed to work. >>> >>> Why are you only marking the two registers that would be used by a PLT entry, >>> but not those clobbered by the ld.so trampoline, or indeed the unknown function >>> that would be called from the PLT. >>> >>> Oh, I see, looking at the code we do actually follow the cgraph and make sure >>> it is a direct call with a known destination. So, in fact, it's only the >>> registers that could be clobbered by ld branch islands (so these two are still >>> correct for aarch64). >>> >>> This means the documentation is actually wrong when it mentions PLTs at all. >> >> Yes, if we go from the point of view that the >> TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS hooks sole purpose is to enable >> the fuse-caller-save optimization. >> >> How about this updated definition ? OK for trunk if re-testing on arm succeeds ? > > I did like the doc including mention of "stubs", because they're easy to > forget. How about > > Set to true if each call that binds to a local definition explicitly clobbers > or sets all non-fixed registers modified by performing the call. That is, by > the call pattern itself, or by code that might be inserted by the linker > (e.g. stubs, veneers, branch islands), but not including those modifiable by > the callee. The affected registers may be mentioned explicitly in the > call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE. > The default version of this hook is set to false. The purpose of this hook > is to enable the fuse-caller-save optimization. > > Looks good to me. Bootstrapped and committed as attached. Thanks, - Tom 2014-06-20 Tom de Vries * target.def (call_fusage_contains_non_callee_clobbers): Update definition. * doc/tm.texi: Regenerate. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index c272630..45281ae 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -4884,14 +4884,14 @@ Whether this target supports splitting the stack when the options described in @ @cindex miscellaneous register hooks @deftypevr {Target Hook} bool TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS -set to true if all the calls in the current function contain clobbers in -CALL_INSN_FUNCTION_USAGE for the registers that are clobbered by the call -rather than by the callee, and are not already set or clobbered in the call -pattern. Examples of such registers are registers used in PLTs and stubs, -and temporary registers used in the call instruction but not present in the -rtl pattern. Another way to formulate it is the registers not present in the -rtl pattern that are clobbered by the call assuming the callee does not -clobber any register. The default version of this hook is set to false. +Set to true if each call that binds to a local definition explicitly +clobbers or sets all non-fixed registers modified by performing the call. +That is, by the call pattern itself, or by code that might be inserted by the +linker (e.g. stubs, veneers, branch islands), but not including those +modifiable by the callee. The affected registers may be mentioned explicitly +in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE. +The default version of this hook is set to false. The purpose of this hook +is to enable the fuse-caller-save optimization. @end deftypevr @node Varargs diff --git a/gcc/target.def b/gcc/target.def index e455211..ee250e6 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -5128,18 +5128,18 @@ FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.", hook_void_bitmap) /* Targets should define this target hook to mark that non-callee clobbers are - present in CALL_INSN_FUNCTION_USAGE for all the calls in the current - function. */ + present in CALL_INSN_FUNCTION_USAGE for all the calls that bind to a local + definition. */ DEFHOOKPOD (call_fusage_contains_non_callee_clobbers, - "set to true if all the calls in the current function contain clobbers in\n\ -CALL_INSN_FUNCTION_USAGE for the registers that are clobbered by the call\n\ -rather than by the callee, and are not already set or clobbered in the call\n\ -pattern. Examples of such registers are registers used in PLTs and stubs,\n\ -and temporary registers used in the call instruction but not present in the\n\ -rtl pattern. Another way to formulate it is the registers not present in the\n\ -rtl pattern that are clobbered by the call assuming the callee does not\n\ -clobber any register. The default version of this hook is set to false.", + "Set to true if each call that binds to a local definition explicitly\n\ +clobbers or sets all non-fixed registers modified by performing the call.\n\ +That is, by the call pattern itself, or by code that might be inserted by the\n\ +linker (e.g. stubs, veneers, branch islands), but not including those\n\ +modifiable by the callee. The affected registers may be mentioned explicitly\n\ +in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.\n\ +The default version of this hook is set to false. The purpose of this hook\n\ +is to enable the fuse-caller-save optimization.", bool, false) -- 1.9.1