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[AARCH64] Enable fuse-caller-save for AARCH64

Message ID 53A32B08.8040106@mentor.com
State New
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Commit Message

Tom de Vries June 19, 2014, 6:25 p.m. UTC 
On 19-06-14 05:53, Richard Henderson wrote:
> On 06/01/2014 03:00 AM, Tom de Vries wrote:
>> >+aarch64_emit_call_insn (rtx pat)
>> >+{
>> >+  rtx insn = emit_call_insn (pat);
>> >+
>> >+  rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
>> >+  clobber_reg (fusage, gen_rtx_REG (word_mode, IP0_REGNUM));
>> >+  clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM));
> Actually, I'd like to know more about how this is supposed to work.
>
> Why are you only marking the two registers that would be used by a PLT entry,
> but not those clobbered by the ld.so trampoline, or indeed the unknown function
> that would be called from the PLT.
>
> Oh, I see, looking at the code we do actually follow the cgraph and make sure
> it is a direct call with a known destination.  So, in fact, it's only the
> registers that could be clobbered by ld branch islands (so these two are still
> correct for aarch64).
>
> This means the documentation is actually wrong when it mentions PLTs at all.

Yes, if we go from the point of view that the 
TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS hooks sole purpose is to enable 
the fuse-caller-save optimization.

How about this updated definition ? OK for trunk if re-testing on arm succeeds ?

Thanks,
- Tom

Comments

Richard Henderson June 19, 2014, 6:41 p.m. UTC | #1 
On 06/19/2014 11:25 AM, Tom de Vries wrote:
> On 19-06-14 05:53, Richard Henderson wrote:
>> On 06/01/2014 03:00 AM, Tom de Vries wrote:
>>> >+aarch64_emit_call_insn (rtx pat)
>>> >+{
>>> >+  rtx insn = emit_call_insn (pat);
>>> >+
>>> >+  rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
>>> >+  clobber_reg (fusage, gen_rtx_REG (word_mode, IP0_REGNUM));
>>> >+  clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM));
>> Actually, I'd like to know more about how this is supposed to work.
>>
>> Why are you only marking the two registers that would be used by a PLT entry,
>> but not those clobbered by the ld.so trampoline, or indeed the unknown function
>> that would be called from the PLT.
>>
>> Oh, I see, looking at the code we do actually follow the cgraph and make sure
>> it is a direct call with a known destination.  So, in fact, it's only the
>> registers that could be clobbered by ld branch islands (so these two are still
>> correct for aarch64).
>>
>> This means the documentation is actually wrong when it mentions PLTs at all.
> 
> Yes, if we go from the point of view that the
> TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS hooks sole purpose is to enable
> the fuse-caller-save optimization.
> 
> How about this updated definition ? OK for trunk if re-testing on arm succeeds ?

I did like the doc including mention of "stubs", because they're easy to
forget.  How about

Set to true if each call that binds to a local definition explicitly clobbers
or sets all non-fixed registers modified by performing the call.  That is, by
the call pattern itself, or by code that might be inserted by the linker
(e.g. stubs, veneers, branch islands), but not including those modifiable by
the callee.  The affected registers may be mentioned explicitly in the
call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.
The default version of this hook is set to false.  The purpose of this hook
is to enable the fuse-caller-save optimization.


r~
diff mbox

Patch

2014-06-19  Tom de Vries  <tom@codesourcery.com>

	* config/arm/arm.c (arm_emit_call_insn): Remove clobber of CC_REGNUM.
	* target.def: Update defition.
	* doc/tm.texi: Regenerate.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d293b5b..178f08b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17642,11 +17642,11 @@  arm_emit_call_insn (rtx pat, rtx addr, bool sibcall)
   if (TARGET_AAPCS_BASED)
     {
       /* For AAPCS, IP and CC can be clobbered by veneers inserted by the
-	 linker.  We need to add these to allow setting
-	 TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS to true.  */
+	 linker.  We need to add IP to allow setting
+	 TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS to true.  CC is not
+	 needed since it's a fixed register.  */
       rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
       clobber_reg (fusage, gen_rtx_REG (word_mode, IP_REGNUM));
-      clobber_reg (fusage, gen_rtx_REG (word_mode, CC_REGNUM));
     }
 }
 
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index c272630..b0a8dbd 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -4884,14 +4884,11 @@  Whether this target supports splitting the stack when the options described in @
 @cindex miscellaneous register hooks
 
 @deftypevr {Target Hook} bool TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS
-set to true if all the calls in the current function contain clobbers in
-CALL_INSN_FUNCTION_USAGE for the registers that are clobbered by the call
-rather than by the callee, and are not already set or clobbered in the call
-pattern.  Examples of such registers are registers used in PLTs and stubs,
-and temporary registers used in the call instruction but not present in the
-rtl pattern.  Another way to formulate it is the registers not present in the
-rtl pattern that are clobbered by the call assuming the callee does not
-clobber any register.  The default version of this hook is set to false.
+Set to true if each call that binds to a local definition contain clobbers
+in CALL_INSN_FUNCTION_USAGE for the non-fixed registers that are clobbered by
+the call rather than by the callee, and are not already set or clobbered in
+the call pattern.  The default version of this hook is set to false.  The
+purpose of this hook it to enable the fuse-caller-save optimization.
 @end deftypevr
 
 @node Varargs
diff --git a/gcc/target.def b/gcc/target.def
index e455211..b738281 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -5128,18 +5128,15 @@  FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.",
  hook_void_bitmap)
 
 /* Targets should define this target hook to mark that non-callee clobbers are
-   present in CALL_INSN_FUNCTION_USAGE for all the calls in the current
-   function.  */
+   present in CALL_INSN_FUNCTION_USAGE for all the calls that bind to a local
+   definition.  */
 DEFHOOKPOD
 (call_fusage_contains_non_callee_clobbers,
- "set to true if all the calls in the current function contain clobbers in\n\
-CALL_INSN_FUNCTION_USAGE for the registers that are clobbered by the call\n\
-rather than by the callee, and are not already set or clobbered in the call\n\
-pattern.  Examples of such registers are registers used in PLTs and stubs,\n\
-and temporary registers used in the call instruction but not present in the\n\
-rtl pattern.  Another way to formulate it is the registers not present in the\n\
-rtl pattern that are clobbered by the call assuming the callee does not\n\
-clobber any register.  The default version of this hook is set to false.",
+ "Set to true if each call that binds to a local definition contain clobbers\n\
+in CALL_INSN_FUNCTION_USAGE for the non-fixed registers that are clobbered by\n\
+the call rather than by the callee, and are not already set or clobbered in\n\
+the call pattern.  The default version of this hook is set to false.  The\n\
+purpose of this hook it to enable the fuse-caller-save optimization.",
  bool, 
  false)
 
-- 
1.9.1