From patchwork Mon May 19 14:44:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 350280 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 09329140091 for ; Tue, 20 May 2014 00:44:26 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=cwx3JPbB5gBOowYFQ DLLZNSQYNjjjPe/b4KD5F9J0EMioFlW6J3Cq0xXsvJhwxft0HIczUJZDIfv3krO2 rNRTvU3bVNmc67r5+pw6jbSFmoAUHV3NmbMtvk5SjWPNYxpjItF1PNnrVnCPk5We UQ2S1ULLbkobODvSeLIfkt4GMM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=6KigQAIn2vgY+J5kTTHIVA+ 6Bhg=; b=X8BaoG2mBA18XHBqi9tamfft3qjRaNLj3NvLY3GMGyyMPISPw1U7M7t IfOGfjPUKvfvtd2WUVcC1LvfLg+REh6xAFhVHIR7eV85doeMA8ii8WZTIo11SurE cECnekl8V6pfFeZOmIB1S5Xax30bp2vWE5pwru7hiyBtA87MrdiU= Received: (qmail 26846 invoked by alias); 19 May 2014 14:44:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 26829 invoked by uid 89); 19 May 2014 14:44:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.3 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 19 May 2014 14:44:16 +0000 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s4JEiBcG002994 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 19 May 2014 10:44:12 -0400 Received: from anchor.twiddle.net (vpn-229-197.phx2.redhat.com [10.3.229.197]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s4JEiAM4027234; Mon, 19 May 2014 10:44:10 -0400 Message-ID: <537A18B9.9070305@redhat.com> Date: Mon, 19 May 2014 07:44:09 -0700 From: Richard Henderson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Marcus Shawcroft CC: Richard Earnshaw , Marcus Shawcroft , GCC Patches Subject: Re: [PATCH] aarch64 suuport for libitm References: <533B3CA6.90305@redhat.com> In-Reply-To: X-IsSubscribed: yes On 05/19/2014 05:15 AM, Marcus Shawcroft wrote: > On 1 April 2014 23:24, Richard Henderson wrote: >> Comments? If approved, should this go in for 4.9, or wait for stage1? >> Certainly it's self-contained... > > > Hi, I think this should go in, with the cache line increased to 128 as > discussed with Andrew. Done. Patch as committed follows. r~ * config/aarch64/sjlj.S: New file. * config/aarch64/target.h: New file. * configure.tgt: Enable aarch64. diff --git a/libitm/config/aarch64/sjlj.S b/libitm/config/aarch64/sjlj.S new file mode 100644 index 0000000..4207da9 --- /dev/null +++ b/libitm/config/aarch64/sjlj.S @@ -0,0 +1,93 @@ +/* Copyright (C) 2014 Free Software Foundation, Inc. + Contributed by Richard Henderson . + + This file is part of the GNU Transactional Memory Library (libitm). + + Libitm is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + Libitm is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#include "asmcfi.h" + + .text + .align 2 + .global _ITM_beginTransaction + .type _ITM_beginTransaction, %function + +_ITM_beginTransaction: + cfi_startproc + mov x1, sp + stp x29, x30, [sp, -11*16]! + cfi_adjust_cfa_offset(11*16) + cfi_rel_offset(x29, 0) + cfi_rel_offset(x30, 8) + mov x29, sp + stp x19, x20, [sp, 1*16] + stp x21, x22, [sp, 2*16] + stp x23, x24, [sp, 3*16] + stp x25, x26, [sp, 4*16] + stp x27, x28, [sp, 5*16] + stp d8, d9, [sp, 6*16] + stp d10, d11, [sp, 7*16] + stp d12, d13, [sp, 8*16] + stp d14, d15, [sp, 9*16] + str x1, [sp, 10*16] + + /* Invoke GTM_begin_transaction with the struct we just built. */ + mov x1, sp + bl GTM_begin_transaction + + /* Return; we don't need to restore any of the call-saved regs. */ + ldp x29, x30, [sp] + add sp, sp, #11*16 + cfi_adjust_cfa_offset(-11*16) + cfi_restore(x29) + cfi_restore(x30) + ret + cfi_endproc + .size _ITM_beginTransaction, . - _ITM_beginTransaction + + .align 2 + .global GTM_longjmp + .hidden GTM_longjmp + .type GTM_longjmp, %function + +GTM_longjmp: + /* The first parameter becomes the return value (x0). + The third parameter is ignored for now. */ + cfi_startproc + ldp x19, x20, [x1, 1*16] + ldp x21, x22, [x1, 2*16] + ldp x23, x24, [x1, 3*16] + ldp x25, x26, [x1, 4*16] + ldp x27, x28, [x1, 5*16] + ldp d8, d9, [x1, 6*16] + ldp d10, d11, [x1, 7*16] + ldp d12, d13, [x1, 8*16] + ldp d14, d15, [x1, 9*16] + ldr x3, [x1, 10*16] + ldp x29, x30, [x1] + cfi_def_cfa(x1, 0) + mov sp, x3 + br x30 + cfi_endproc + .size GTM_longjmp, . - GTM_longjmp + +#ifdef __linux__ +.section .note.GNU-stack, "", %progbits +#endif diff --git a/libitm/config/aarch64/target.h b/libitm/config/aarch64/target.h new file mode 100644 index 0000000..cb0f336 --- /dev/null +++ b/libitm/config/aarch64/target.h @@ -0,0 +1,45 @@ +/* Copyright (C) 2014 Free Software Foundation, Inc. + Contributed by Richard Henderson . + + This file is part of the GNU Transactional Memory Library (libitm). + + Libitm is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + Libitm is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +namespace GTM HIDDEN { + +typedef struct gtm_jmpbuf +{ + unsigned long long fp; /* x29 */ + unsigned long long pc; /* x30 */ + unsigned long long gr[10]; /* x19-x28 */ + unsigned long long vr[8]; /* d8-d15 */ + void *cfa; +} gtm_jmpbuf; + +/* ??? The size of one line in hardware caches (in bytes). */ +#define HW_CACHELINE_SIZE 128 + +static inline void +cpu_relax (void) +{ + __asm volatile ("" : : : "memory"); +} + +} // namespace GTM diff --git a/libitm/configure.tgt b/libitm/configure.tgt index 4694a9b..44c1a14 100644 --- a/libitm/configure.tgt +++ b/libitm/configure.tgt @@ -46,6 +46,7 @@ fi # Map the target cpu to an ARCH sub-directory. At the same time, # work out any special compilation flags as necessary. case "${target_cpu}" in + aarch64*) ARCH=aarch64 ;; alpha*) ARCH=alpha ;; rs6000 | powerpc*) XCFLAGS="${XCFLAGS} -mhtm"