From patchwork Thu Feb 27 13:58:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 324817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 532A62C009C for ; Fri, 28 Feb 2014 00:58:16 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=LEYKPRTIYR3PQGYlkTd5oIAmLAUyRUx+5ENlhvdgo8eJ+G xVeCXNb7O9VD68bGjk13ljnuA/DpV5/unNqf0W6wJ8xuDHLQnP/XJlzikoIFWXnn Nr7oGQYb9+4dsmGWAVnd4h8oq9/sC0+HjaE0MCqskZ1bwymtg5XcC8mOHx+5o= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=QGVXL5/VVS6FaZoTFIeq+YoUVIc=; b=SlMnf3PKvNTxX47bSrLT cMzygWfONeR2NUWZlh1LCRKzg6TWkASn+flYhlfHrUbQGruxJIVAXzV96GvIYv79 z2hnCec3sgi+VK+R+/0a+hAQavHDU9LCPyBw6Ask7zP3v9AsGJun/Rj1xO5OF5Ry FUMVsLXZj4Kgn0l2aAb3dw0= Received: (qmail 8211 invoked by alias); 27 Feb 2014 13:58:10 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8200 invoked by uid 89); 27 Feb 2014 13:58:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Feb 2014 13:58:08 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 27 Feb 2014 13:58:06 +0000 Received: from [10.1.209.147] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 27 Feb 2014 13:58:11 +0000 Message-ID: <530F446D.2020007@arm.com> Date: Thu, 27 Feb 2014 13:58:05 +0000 From: Ramana Radhakrishnan User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:14.0) Gecko/20120713 Thunderbird/14.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org ;" Subject: [Patch ARM] Allow any register for DImode values in Thumb2. X-MC-Unique: 114022713580603701 X-IsSubscribed: yes Hi I noticed that for T32 we don't allow any old register for DImode values. The restriction of an even register is true only for ARM state because the ISA doesn't allow any old register in this place. In a few large .i files that I had knocking about, noticed a nice drop in stack usage and a generally improved register allocation strategy. Queued for stage1 after suitable testing including a bootstrap and regression test in Thumb2 found no issues. regards Ramana Ramana Radhakrishnan * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen restrictions on core registers for DImode values in Thumb2. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b49f43e..73dc04a 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -22593,12 +22593,19 @@ arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) } /* We allow almost any value to be stored in the general registers. - Restrict doubleword quantities to even register pairs so that we can - use ldrd. Do not allow very large Neon structure opaque modes in - general registers; they would use too many. */ + Restrict doubleword quantities to even register pairs in ARM state + so that we can use ldrd. Do not allow very large Neon structure + opaque modes in general registers; they would use too many. */ if (regno <= LAST_ARM_REGNUM) - return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0) - && ARM_NUM_REGS (mode) <= 4; + { + if (ARM_NUM_REGS (mode) > 4) + return FALSE; + + if (TARGET_THUMB2) + return TRUE; + + return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0); + } if (regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)