From patchwork Mon Feb 24 09:11:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 323508 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0AEA82C014B for ; Mon, 24 Feb 2014 20:11:26 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=cx97AdgorcVg6KKUXkqLQLTnJnITb8mMP3sVlHNBboldzy cAQXSzLC951WpUvTL91JgovY/npnQ0ff+0/m/EVf0zq6f2IS9mfTO9ohYlpMdm9u E5r8SIOYkSL4jpKZIl9o6GH3F/OY8jQPGQDgvPXqqglO26hDxVi4K0Knz9AY8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=Dm5P05Mec8crDcSFB980KG96YGg=; b=N+qLmyXwGyPRHkpmnGg4 xj/LymdXh0hVK52E62dEM8bo60N06wFI70TsRz++K74Ko7/97LaaKeC9FMz6KpHP t8n2lK7iRuVfI58JO3ffT+cAmyQDlBky5PxmJNp/6rRgSQ/EnuDESB5RiR5RZukB l3R/Aiv86sJPI5SIaEoxwnk= Received: (qmail 32622 invoked by alias); 24 Feb 2014 09:11:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 32611 invoked by uid 89); 24 Feb 2014 09:11:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00 autolearn=ham version=3.3.2 X-HELO: eu1sys200aog121.obsmtp.com Received: from eu1sys200aog121.obsmtp.com (HELO eu1sys200aog121.obsmtp.com) (207.126.144.151) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) SMTP; Mon, 24 Feb 2014 09:11:17 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob121.postini.com ([207.126.147.11]) with SMTP ID DSNKUwsMseo0n7uxUtlhduPhKFcm/6gnwMOg@postini.com; Mon, 24 Feb 2014 09:11:16 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7EC171BD for ; Mon, 24 Feb 2014 09:11:13 +0000 (GMT) Received: from Webmail-eu.st.com (safex1hubcas3.st.com [10.75.90.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 363E059E3 for ; Mon, 24 Feb 2014 09:11:13 +0000 (GMT) Received: from [164.129.122.166] (164.129.122.166) by webmail-eu.st.com (10.75.90.13) with Microsoft SMTP Server (TLS) id 8.3.297.1; Mon, 24 Feb 2014 10:11:12 +0100 Message-ID: <530B0CB0.8090201@st.com> Date: Mon, 24 Feb 2014 10:11:12 +0100 From: Christian Bruel User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:17.0) Gecko/20130307 Thunderbird/17.0.4 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH ARM]: Fix more -mapcs-frame failures X-IsSubscribed: yes This patch improves the one sent previously, (http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01159.html), to fix a few more failures in the testsuite that could arise with shrink-wrap and -fexceptions. To recall, the problem that it fixes is that with -mapcs-frame : - the epilogue pops as sub sp, fp, #12 @ does not set FRAME_RELATED_P ldmia sp, {fp, sp, lr} @ XXX assert def_cfa->reg is FP instead of SP - with vrp this is worse, we have fldmfdd ip!, {d8} @ FRAME_RELATED_P sub sp, fp, #20 ... ldmfd sp, {r3, r4, fp, sp, pc} @ XXX assert def_cfa->reg is IP instead of SP, Fixed by inserting a REG_CFA_DEF_CFA note, fixing the arm_unwind_emit machinery and setting the FRAME_RELATED_P . The comment says : /* The INSN is generated in epilogue. It is set as RTX_FRAME_RELATED_P to get correct dwarf information for shrink-wrap. We should not emit unwind information for it because these are used either for pretend arguments or notes to adjust sp and restore registers from stack. */ the testsuite score improves without regression (improvements from -g and -fexeptions tests) === gcc Summary for arm-sim//-mapcs-frame === # of expected passes 77545 # of unexpected failures 31 # of unexpected successes 2 # of expected failures 172 # of unsupported tests 1336 === g++ Summary for arm-sim//-mapcs-frame === # of expected passes 50116 # of unexpected failures 9 # of unexpected successes 3 # of expected failures 280 # of unsupported tests 1229 instead of === gcc Summary for arm-sim//-mapcs-frame === # of expected passes 77106 # of unexpected failures 500 # of unexpected successes 2 # of expected failures 172 # of unresolved testcases 111 # of unsupported tests 1336 === g++ Summary for arm-sim//-mapcs-frame === # of expected passes 50021 # of unexpected failures 136 # of unexpected successes 3 # of expected failures 280 # of unsupported tests 1229 Comments ? OK for trunk ? Many thanks 2014-02-18 Christian Bruel PR target/60264 * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a REG_CFA_DEF_CFA note. (arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note. (arm_unwind_emit): Allow REG_CFA_DEF_CFA. 2014-02-18 Christian Bruel PR target/60264 * gcc.target/arm/pr60264.c * gcc.target/arm/pr60264-2.c Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 207942) +++ gcc/config/arm/arm.c (working copy) @@ -19909,8 +19909,15 @@ arm_emit_vfp_multi_reg_pop (int first_reg, int num par = emit_insn (par); REG_NOTES (par) = dwarf; - arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs, - base_reg, base_reg); + /* Make sure cfa doesn't leave with IP_REGNUM to allow unwinding fron FP. */ + if (TARGET_VFP && REGNO (base_reg) == IP_REGNUM) + { + RTX_FRAME_RELATED_P (par) = 1; + add_reg_note (par, REG_CFA_DEF_CFA, hard_frame_pointer_rtx); + } + else + arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs, + base_reg, base_reg); } /* Generate and emit a pattern that will be recognized as LDRD pattern. If even @@ -27098,15 +27105,19 @@ arm_expand_epilogue_apcs_frame (bool really_return if (TARGET_HARD_FLOAT && TARGET_VFP) { int start_reg; + rtx ip_rtx = gen_rtx_REG (SImode, IP_REGNUM); /* The offset is from IP_REGNUM. */ int saved_size = arm_get_vfp_saved_size (); if (saved_size > 0) { + rtx insn; floats_from_frame += saved_size; - emit_insn (gen_addsi3 (gen_rtx_REG (SImode, IP_REGNUM), - hard_frame_pointer_rtx, - GEN_INT (-floats_from_frame))); + insn = emit_insn (gen_addsi3 (ip_rtx, + hard_frame_pointer_rtx, + GEN_INT (-floats_from_frame))); + arm_add_cfa_adjust_cfa_note (insn, -floats_from_frame, + ip_rtx, hard_frame_pointer_rtx); } /* Generate VFP register multi-pop. */ @@ -27179,11 +27190,15 @@ arm_expand_epilogue_apcs_frame (bool really_return num_regs = bit_count (saved_regs_mask); if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca) { + rtx insn; emit_insn (gen_blockage ()); /* Unwind the stack to just below the saved registers. */ - emit_insn (gen_addsi3 (stack_pointer_rtx, - hard_frame_pointer_rtx, - GEN_INT (- 4 * num_regs))); + insn = emit_insn (gen_addsi3 (stack_pointer_rtx, + hard_frame_pointer_rtx, + GEN_INT (- 4 * num_regs))); + + arm_add_cfa_adjust_cfa_note (insn, - 4 * num_regs, + stack_pointer_rtx, hard_frame_pointer_rtx); } arm_emit_multi_reg_pop (saved_regs_mask); @@ -28975,11 +28990,11 @@ arm_unwind_emit (FILE * asm_out_file, rtx insn) emit unwind information for it because these are used either for pretend arguments or notes to adjust sp and restore registers from stack. */ + case REG_CFA_DEF_CFA: case REG_CFA_ADJUST_CFA: case REG_CFA_RESTORE: return; - case REG_CFA_DEF_CFA: case REG_CFA_EXPRESSION: case REG_CFA_OFFSET: /* ??? Only handling here what we actually emit. */ Index: gcc/testsuite/gcc.target/arm/pr60264-2.c =================================================================== --- gcc/testsuite/gcc.target/arm/pr60264-2.c (revision 0) +++ gcc/testsuite/gcc.target/arm/pr60264-2.c (working copy) @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mapcs -mfloat-abi=hard -g" } */ + +double bar(void); + +int foo(void) +{ + int i = bar() + bar(); + + return i; +} + Index: gcc/testsuite/gcc.target/arm/pr60264.c =================================================================== --- gcc/testsuite/gcc.target/arm/pr60264.c (revision 0) +++ gcc/testsuite/gcc.target/arm/pr60264.c (working copy) @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mapcs -g" } */ + +void +bar() +{ + foo(); + foo(); +}