From patchwork Mon Jan 13 06:21:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Law X-Patchwork-Id: 309698 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0A9292C0081 for ; Mon, 13 Jan 2014 17:22:12 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=fGgl8r88cGj6XZXMz mw9xXNZYgGlrR//XaIyMhGvI2FjqbshoNkEhrKmXxlHNbbpdc1tZ4lxWlBc2z/hX R4KWdvb5EQLRcH/T9D2UqZKLMkRulnpvOAvyb4LEx34Y+F82ni9mv7cMPj/0+owD iS7v+R68ittxsEyeqWveInayqI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=I4V2FnJ2Gev2rVK/vReRNam ZHd4=; b=R/Wfxq9lb79sb0BCYCWbpL4Lgyc1t2ftk0uTdW56Z7i/qPow7PPiRdg a9f25sVgjJvmIGjvzxXEi4Mad8WP+UdrPYC43Rbwe3r07O64BS4qCPw4F+u0bsZk /KPkkVydG3ICeXYJg3R0ozzCCN6bRoJGRYZzfKca4fZN5qACEt+U= Received: (qmail 32288 invoked by alias); 13 Jan 2014 06:22:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 32277 invoked by uid 89); 13 Jan 2014 06:22:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 13 Jan 2014 06:22:02 +0000 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s0D6M0A1026139 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 13 Jan 2014 01:22:00 -0500 Received: from stumpy.slc.redhat.com (ovpn-113-36.phx2.redhat.com [10.3.113.36]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id s0D6M0sl002527; Mon, 13 Jan 2014 01:22:00 -0500 Message-ID: <52D38607.4090700@redhat.com> Date: Sun, 12 Jan 2014 23:21:59 -0700 From: Jeff Law User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: Jakub Jelinek CC: gcc-patches Subject: Re: [RFA] [PATCH][PR tree-optimization/59749] Fix recently introduced ree bug References: <52D067EF.7020005@redhat.com> <20140110215227.GJ892@tucnak.redhat.com> In-Reply-To: <20140110215227.GJ892@tucnak.redhat.com> X-IsSubscribed: yes On 01/10/14 14:52, Jakub Jelinek wrote: > There is one thing I still worry about, if some target has > an insn to say sign extend or zero extend a short memory load > into HARD_REGNO_NREGS () > 1 register, but the other involved > register has the only one (or fewer) hard registers available to it. > Consider registers SImode hard registers 0, 1, 2, 3: > (set (reg:SI 3) (something:SI)) > (set (reg:HI 0) (expression:HI)) > (set (reg:SI 2) (sign_extend:SI (reg:HI 0))) > (set (reg:DI 0) (sign_extend:DI (reg:HI 0))) > (use (reg:SI 3)) > we transform this into: > (set (reg:SI 3) (something:SI)) > (set (reg:SI 2) (sign_extend:SI (expression:HI))) > (set (reg:SI 0) (reg:HI 2)) > (set (reg:DI 0) (sign_extend:DI (reg:HI 0))) > (use (reg:SI 3)) > first (well, the middle is then pending in copy list), and next: > (set (reg:SI 3) (something)) > (set (reg:DI 2) (sign_extend:DI (expression:HI))) > (set (reg:DI 0) (reg:DI 2)) > (use (reg:SI 3)) > but that looks wrong, because the second instruction would now clobber > (reg:SI 3). Dunno if we have such an target and thus if it is possible > to construct a testcase. No need to construct a testcase, there's a few that trip the condition in the existing testsuite :-) Basically I just put a check in combine_set_extension to detect when widening of the result of the reaching def requires more hard registers than it previously needed and ran the testsuite. > So, I'd say the handling of the second extend should notice that > it is actually extending load into a different register and bail out > if it would need more hard registers than it needed previously, or > something similar. Yes, like in the attached patch? OK for the trunk? commit 1313449102ac8d62e36818d8660ef2e897bd59e3 Author: Jeff Law Date: Fri Jan 10 14:31:15 2014 -0700 PR tree-optimization/59747 * ree.c (find_and_remove_re): Properly handle case where a second eliminated extension requires widening a copy created for elimination of a prior extension. (combine_set_extension): Ensure that the number of hard regs needed for a destination register does not change when we widen it. PR tree-optimization/59747 * gcc.c-torture/execute/pr59747.c: New test. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c554609..a82e23c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -5,6 +5,13 @@ occurs before the extension when optimizing extensions with different source and destination hard registers. + PR tree-optimization/59747 + * ree.c (find_and_remove_re): Properly handle case where a second + eliminated extension requires widening a copy created for elimination + of a prior extension. + (combine_set_extension): Ensure that the number of hard regs needed + for a destination register does not change when we widen it. + 2014-01-10 Jan Hubicka PR ipa/58585 diff --git a/gcc/ree.c b/gcc/ree.c index 63cc8cc..3ee97cd 100644 --- a/gcc/ree.c +++ b/gcc/ree.c @@ -297,6 +297,13 @@ combine_set_extension (ext_cand *cand, rtx curr_insn, rtx *orig_set) else new_reg = gen_rtx_REG (cand->mode, REGNO (SET_DEST (*orig_set))); + /* We're going to be widening the result of DEF_INSN, ensure that doing so + doesn't change the number of hard registers needed for the result. */ + if (HARD_REGNO_NREGS (REGNO (new_reg), cand->mode) + != HARD_REGNO_NREGS (REGNO (SET_SRC (*orig_set)), + GET_MODE (SET_DEST (*orig_set)))) + return false; + /* Merge constants by directly moving the constant into the register under some conditions. Recall that RTL constants are sign-extended. */ if (GET_CODE (orig_src) == CONST_INT @@ -1017,11 +1024,20 @@ find_and_remove_re (void) for (unsigned int i = 0; i < reinsn_copy_list.length (); i += 2) { rtx curr_insn = reinsn_copy_list[i]; + rtx def_insn = reinsn_copy_list[i + 1]; + + /* Use the mode of the destination of the defining insn + for the mode of the copy. This is necessary if the + defining insn was used to eliminate a second extension + that was wider than the first. */ + rtx sub_rtx = *get_sub_rtx (def_insn); rtx pat = PATTERN (curr_insn); - rtx new_reg = gen_rtx_REG (GET_MODE (SET_DEST (pat)), + rtx new_dst = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), REGNO (XEXP (SET_SRC (pat), 0))); - rtx set = gen_rtx_SET (VOIDmode, new_reg, SET_DEST (pat)); - emit_insn_after (set, reinsn_copy_list[i + 1]); + rtx new_src = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), + REGNO (SET_DEST (pat))); + rtx set = gen_rtx_SET (VOIDmode, new_dst, new_src); + emit_insn_after (set, def_insn); } /* Delete all useless extensions here in one sweep. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f40d56e..a603952 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -3,6 +3,9 @@ PR middle-end/59743 * gcc.c-torture/compile/pr59743.c: New test. + PR tree-optimization/59747 + * gcc.c-torture/execute/pr59747.c: New test. + 2014-01-10 Jan Hubicka PR ipa/58585 diff --git a/gcc/testsuite/gcc.c-torture/execute/pr59747.c b/gcc/testsuite/gcc.c-torture/execute/pr59747.c new file mode 100644 index 0000000..d45a908 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr59747.c @@ -0,0 +1,27 @@ +extern void abort (void); +extern void exit (int); + +int a[6], b, c = 1, d; +short e; + +int __attribute__ ((noinline)) +fn1 (int p) +{ + b = a[p]; +} + +int +main () +{ + if (sizeof (long long) != 8) + exit (0); + + a[0] = 1; + if (c) + e--; + d = e; + long long f = e; + if (fn1 ((f >> 56) & 1) != 0) + abort (); + exit (0); +}