From patchwork Fri Dec 6 17:36:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejas Belagod X-Patchwork-Id: 298138 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EFF752C00A2 for ; Sat, 7 Dec 2013 04:36:33 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=kbwvyI393+YzVzCQKxSAq49jy+QUTKMVdWA6cIGkJtO85+ ELgAu83sPl9fAV1dZpChKcbKuM3klBVOXi7A4BxWESFlnOBO5TmtUR6R16sIoLCh pfXXBbgHLhinwAd45ntJYry3IDfjytI2S+abPXqy3yRt5XPMGP0/w/slAAYVA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=hsqAx7/OHDaQ25XqR0XoMePJizw=; b=O9liQntw404xMlPM7EZQ yj9toS8b+/FO2ipDRIA7v61BEJyVWH47LJD3XNv23vm+tmxMUWot3gdb/WM2l80T d6Vp8DFy8cVmpaoedTCHCR/xR3mtSXIAuVE2DykzJHXa8LI9AKAmZb2kE0cT6DeD kkg0/eB3HhDa4rTIUgRE57o= Received: (qmail 1057 invoked by alias); 6 Dec 2013 17:36:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 990 invoked by uid 89); 6 Dec 2013 17:36:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from Unknown (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 06 Dec 2013 17:36:12 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 06 Dec 2013 17:36:03 +0000 Received: from [10.1.203.80] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 6 Dec 2013 17:36:03 +0000 Message-ID: <52A20B03.8050407@arm.com> Date: Fri, 06 Dec 2013 17:36:03 +0000 From: Tejas Belagod User-Agent: Thunderbird 2.0.0.18 (X11/20081120) MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [Patch, AArch64] [3/6] Implement support for Crypto -- AES. X-MC-Unique: 113120617360308501 X-IsSubscribed: yes Hi, The attached patch implements support for AES crypto instructions. Tested on aarch64-none-elf. OK for trunk? Thanks, Tejas. 2013-12-06 Tejas Belagod gcc/ * config/aarch64/aarch64-simd-builtins.def: Update builtins table. * config/aarch64/aarch64-simd.md (aarch64_crypto_aesv16qi, aarch64_crypto_aesv16qi): New. * config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8, vaesimcq_u8): New. * config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC, UNSPEC_AESIMC): New. (CRYPTO_AES, CRYPTO_AESMC): New int iterators. (aes_op, aesmc_op): New int attributes. testsuite/ * gcc.target/aarch64/aes.c: New. diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index c18b150..49ab482 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -362,3 +362,8 @@ /* Implemented by fma4. */ BUILTIN_VDQF (TERNOP, fma, 4) + /* Implemented by aarch64_crypto_aes. */ + VAR1 (BINOP, crypto_aese, 0, v16qi) + VAR1 (BINOP, crypto_aesd, 0, v16qi) + VAR1 (UNOP, crypto_aesmc, 0, v16qi) + VAR1 (UNOP, crypto_aesimc, 0, v16qi) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 5dcbc62..4b17748 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -4074,3 +4074,25 @@ (gen_aarch64_get_lane (operands[0], operands[1], operands[2])); DONE; }) + +;; aes + +(define_insn "aarch64_crypto_aesv16qi" + [(set (match_operand:V16QI 0 "register_operand" "=w") + (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "0") + (match_operand:V16QI 2 "register_operand" "w")] + CRYPTO_AES))] + "TARGET_SIMD && TARGET_CRYPTO" + "aes\\t%0.16b, %2.16b" + [(set_attr "type" "crypto_aes")] +) + +(define_insn "aarch64_crypto_aesv16qi" + [(set (match_operand:V16QI 0 "register_operand" "=w") + (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "w")] + CRYPTO_AESMC))] + "TARGET_SIMD && TARGET_CRYPTO" + "aes\\t%0.16b, %1.16b" + [(set_attr "type" "crypto_aes")] +) + diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index dc56170..9f35e09 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -15793,6 +15793,42 @@ vaddvq_f64 (float64x2_t __a) return vgetq_lane_f64 (__t, __LANE0 (2)); } +#ifdef __ARM_FEATURE_CRYPTO + +/* vaes */ + +static __inline uint8x16_t +vaeseq_u8 (uint8x16_t data, uint8x16_t key) +{ + return + (uint8x16_t) __builtin_aarch64_crypto_aesev16qi ((int8x16_t) data, + (int8x16_t) key); +} + +static __inline uint8x16_t +vaesdq_u8 (uint8x16_t data, uint8x16_t key) +{ + return + (uint8x16_t) __builtin_aarch64_crypto_aesdv16qi ((int8x16_t) data, + (int8x16_t) key); +} + +static __inline uint8x16_t +vaesmcq_u8 (uint8x16_t data) +{ + return + (uint8x16_t) __builtin_aarch64_crypto_aesmcv16qi ((int8x16_t) data); +} + +static __inline uint8x16_t +vaesimcq_u8 (uint8x16_t data) +{ + return + (uint8x16_t) __builtin_aarch64_crypto_aesimcv16qi ((int8x16_t) data); +} + +#endif + /* vcage */ __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index fd7152c..91d6f74 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -263,6 +263,10 @@ UNSPEC_UZP2 ; Used in vector permute patterns. UNSPEC_TRN1 ; Used in vector permute patterns. UNSPEC_TRN2 ; Used in vector permute patterns. + UNSPEC_AESE ; Used in aarch64-simd.md. + UNSPEC_AESD ; Used in aarch64-simd.md. + UNSPEC_AESMC ; Used in aarch64-simd.md. + UNSPEC_AESIMC ; Used in aarch64-simd.md. ]) ;; ------------------------------------------------------------------- @@ -843,6 +847,9 @@ (define_int_iterator FRECP [UNSPEC_FRECPE UNSPEC_FRECPX]) +(define_int_iterator CRYPTO_AES [UNSPEC_AESE UNSPEC_AESD]) +(define_int_iterator CRYPTO_AESMC [UNSPEC_AESMC UNSPEC_AESIMC]) + ;; ------------------------------------------------------------------- ;; Int Iterators Attributes. ;; ------------------------------------------------------------------- @@ -959,3 +966,7 @@ (UNSPEC_UZP1 "1") (UNSPEC_UZP2 "2")]) (define_int_attr frecp_suffix [(UNSPEC_FRECPE "e") (UNSPEC_FRECPX "x")]) + +(define_int_attr aes_op [(UNSPEC_AESE "e") (UNSPEC_AESD "d")]) +(define_int_attr aesmc_op [(UNSPEC_AESMC "mc") (UNSPEC_AESIMC "imc")]) + diff --git a/gcc/testsuite/gcc.target/aarch64/aes.c b/gcc/testsuite/gcc.target/aarch64/aes.c new file mode 100644 index 0000000..82665fa --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/aes.c @@ -0,0 +1,40 @@ + +/* { dg-do compile } */ +/* { dg-options "-march=armv8-a+crypto" } */ + +#include "arm_neon.h" + +uint8x16_t +test_vaeseq_u8 (uint8x16_t data, uint8x16_t key) +{ + return vaeseq_u8 (data, key); +} + +/* { dg-final { scan-assembler "aese\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" } } */ + +uint8x16_t +test_vaesdq_u8 (uint8x16_t data, uint8x16_t key) +{ + return vaesdq_u8 (data, key); +} + +/* { dg-final { scan-assembler "aesd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" } } */ + +uint8x16_t +test_vaesmcq_u8 (uint8x16_t data) +{ + return vaesmcq_u8 (data); +} + +/* { dg-final { scan-assembler "aesmc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" } } */ + +uint8x16_t +test_vaesimcq_u8 (uint8x16_t data) +{ + return vaesimcq_u8 (data); +} + +/* { dg-final { scan-assembler "aesimc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" } } */ + + +/* { dg-final { cleanup-saved-temps } } */