===================================================================
@@ -2272,7 +2272,6 @@ lra (FILE *f)
{
for (;;)
{
- bitmap_clear (&lra_optional_reload_pseudos);
/* We should try to assign hard registers to scratches even
if there were no RTL transformations in
lra_constraints. */
@@ -2311,6 +2310,7 @@ lra (FILE *f)
live_p = false;
}
}
+ bitmap_clear (&lra_optional_reload_pseudos);
bitmap_clear (&lra_inheritance_pseudos);
bitmap_clear (&lra_split_regs);
if (! lra_need_for_spills_p ())
===================================================================
@@ -1213,24 +1213,26 @@ simplify_operand_subreg (int nop, enum m
enum reg_class rclass
= (enum reg_class) targetm.preferred_reload_class (reg, ALL_REGS);
- new_reg = lra_create_new_reg_with_unique_value (reg_mode, reg, rclass,
- "subreg reg");
- bitmap_set_bit (&lra_optional_reload_pseudos, REGNO (new_reg));
- if (type != OP_OUT
- || GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode))
+ if (get_reload_reg (curr_static_id->operand[nop].type, reg_mode, reg,
+ rclass, "subreg reg", &new_reg))
{
- push_to_sequence (before);
- lra_emit_move (new_reg, reg);
- before = get_insns ();
- end_sequence ();
- }
- if (type != OP_IN)
- {
- start_sequence ();
- lra_emit_move (reg, new_reg);
- emit_insn (after);
- after = get_insns ();
- end_sequence ();
+ bitmap_set_bit (&lra_optional_reload_pseudos, REGNO (new_reg));
+ if (type != OP_OUT
+ || GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode))
+ {
+ push_to_sequence (before);
+ lra_emit_move (new_reg, reg);
+ before = get_insns ();
+ end_sequence ();
+ }
+ if (type != OP_IN)
+ {
+ start_sequence ();
+ lra_emit_move (reg, new_reg);
+ emit_insn (after);
+ after = get_insns ();
+ end_sequence ();
+ }
}
SUBREG_REG (operand) = new_reg;
lra_process_new_insns (curr_insn, before, after,
===================================================================
@@ -0,0 +1,7 @@
+/* PR target/56225 */
+/* { dg-do compile { target { ia32 } } } */
+/* { dg-options "-O2 -fno-omit-frame-pointer -march=i686 -fpic" } */
+
+void NoBarrier_AtomicExchange (long long *ptr) {
+ while (__sync_val_compare_and_swap (ptr, 1, 0) );
+}
The following patch fixes http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56246 LRA was not able to find enough regs for insn reloads. One reason of that was it did not try to reuse the same reload reg for the same value. Another reason was it tried to assign hard reg to a pseudo in any case, as the code account the pseudo as reload one and the pseudo is actually optional reload pseudo (the code lost track of this on the second constraint subpass iteration). The patch was bootstrapped and tested on x86/x86-64. Committed as rev. 195502. 2013-02-08 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/56246 * lra-constraints.c (simplify_operand_subreg): Try tor reuse reload pseudo. * lra.c (lra): Clear lra_optional_reload_pseudos only when all constraints are satisfied. 2013-02-08 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/56246 * gcc.target/i386/pr56246.c: New test.