From patchwork Tue Feb 27 16:04:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 878663 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-473941-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="Odo2eHA9"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zrNn03zq1z9s1X for ; Wed, 28 Feb 2018 03:04:35 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=VF2ytVUZ3CNFeYiXh5S0DainMb1/c2juLU87Y6FCZCMJLuNqCr /HZqIPUdAC7nZ5eJu/gmbHKfhijaROll6CQ3y33WtdUxdsln0eoCQczeSjlZl4Vv 7pVQn+6xwRN7mALs02EtA7WIp212SfbdgH4Ke2jQjQdhS3A188LFalYcU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=ONNJrzBS1ElN0ONRyiRIRB0gpGQ=; b=Odo2eHA93NC4Hx+Lx0fL gu/RAyBmcrvOvvNt4z8+aweFmjFyLeIi5SpXNkOdU+tRkDiFw2vAXBU9F/QlV9mR 55rVo3ObuCQyEm/IVfqKoVxTsO98HuNPz4Q7kyQfGyupXAdxoymiuJkjOwL0vCaC lNjsZfTR+H/3U/5/BN213UY= Received: (qmail 81106 invoked by alias); 27 Feb 2018 16:04:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 81094 invoked by uid 89); 27 Feb 2018 16:04:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=cname, Hx-languages-length:5870 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 27 Feb 2018 16:04:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB7691435 for ; Tue, 27 Feb 2018 08:04:24 -0800 (PST) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5855C3F25C for ; Tue, 27 Feb 2018 08:04:24 -0800 (PST) To: "gcc-patches@gcc.gnu.org" From: Thomas Preudhomme Subject: [arm-embedded] Allow -mcpu=cortex-m33+nodsp Message-ID: <4dedb21e-2fd3-e469-78b7-7ca11254c262@foss.arm.com> Date: Tue, 27 Feb 2018 16:04:23 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi, we decided to apply the following patch to ARM/embedded-7-branch to support -mcpu=cortex-m33+nodsp. DSP instructions are optional for Arm Cortex-M33, yet its -mcpu option does not allow +nodsp. Users are thus left with using -march=armv8-m.main -mtune=cortex-m33. This patch creates a new cpu cortex-m33+nodsp since there is no mechanism on GCC 7 for CPU extensions. Since GCC passes the -mcpu parameter down to GAS verbatim and that GAS does not support +nodsp for cortex-m33, this patch also special cases -mcpu=cortex-m33 in arm_file_start to output a .arch option instead of .cpu. 2018-02-26 Thomas Preud'homme * config/arm/arm-cpus.in (cortex-m33+nodsp): New CPU. * config/arm/arm-cpu-cdata.h: Regenerate. * config/arm/arm-cpu-data.h: Likewise. * config/arm/arm-cpu.h: Likewise. * config/arm/arm-tables.opt: Likewise. * config/arm/arm-tune.md: Likewise. * config/arm/arm.c (arm_file_start): Special case * -mcpu=cortex-m33+nodsp to emit .arch armv8-m.main instead. * doc/invoke.texi: Document cortex-m33+nodsp as a valid value for -mcpu and -mtune. Testing: Compiled a hello world with -S -mcpu=cortex-m33 and with -S -mcpu=cortex-m33+dsp and compared both assembly files. The latter correctly emits .arch armv8-m.main instead of .cpu cortex-m33. Best regards, Thomas diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm index a98ecb028f6800a516f6cd252390ceac1e08911b..e09bd132d224aee511591143d86efff8bb156d60 100644 --- a/gcc/ChangeLog.arm +++ b/gcc/ChangeLog.arm @@ -1,3 +1,9 @@ +2018-02-26 Thomas Preud'homme + + * config/arm/arm-cpus.in (cortex-m33+nodsp): Define. + * doc/invoke.texi: Document +nodsp as a valid extension for + -mcpu=cortex-m33. + 2017-11-23 Thomas Preud'homme Cherry-pick from GCC 7 diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h index 27571c841d928fe9c331006bfc9608c4e75b60d8..f5e34c830ca28196ded0912c230f719a6ff5681e 100644 --- a/gcc/config/arm/arm-cpu-cdata.h +++ b/gcc/config/arm/arm-cpu-cdata.h @@ -789,6 +789,13 @@ static const struct arm_arch_core_flag arm_arch_core_flags[] = }, }, { + "cortex-m33+nodsp", + { + ISA_ARMv8m_main, + isa_nobit + }, + }, + { "cortex-r52", { ISA_ARMv8r,isa_bit_crc32, diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h index e474efa02ed93a93ae00ac2057a9bc841c48b87f..30902ecabc6c72e46e6f6aa1d92b9980fd639dcd 100644 --- a/gcc/config/arm/arm-cpu-data.h +++ b/gcc/config/arm/arm-cpu-data.h @@ -1221,6 +1221,17 @@ static const struct processors all_cores[] = &arm_v7m_tune }, { + "cortex-m33+nodsp", + TARGET_CPU_cortexm33nodsp, + (TF_LDSCHED), + "8M_MAIN", BASE_ARCH_8M_MAIN, + { + ISA_ARMv8m_main, + isa_nobit + }, + &arm_v7m_tune + }, + { "cortex-r52", TARGET_CPU_cortexr52, (TF_LDSCHED), diff --git a/gcc/config/arm/arm-cpu.h b/gcc/config/arm/arm-cpu.h index 502965081faa625abc93d97559517baf50972e1b..22566495fdf0da0ad75b81a5956eecb898c38684 100644 --- a/gcc/config/arm/arm-cpu.h +++ b/gcc/config/arm/arm-cpu.h @@ -130,6 +130,7 @@ enum processor_type TARGET_CPU_cortexa73cortexa53, TARGET_CPU_cortexm23, TARGET_CPU_cortexm33, + TARGET_CPU_cortexm33nodsp, TARGET_CPU_cortexr52, TARGET_CPU_arm_none }; diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 5f18dfb35687888bc7f642785693f75658a96733..7368a067db92b384f83fdb4a0af6cb77cff4e6f4 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1090,6 +1090,13 @@ begin cpu cortex-m33 costs v7m end cpu cortex-m33 +begin cpu cortex-m33+nodsp + cname cortexm33nodsp + tune flags LDSCHED + architecture armv8-m.main + costs v7m +end cpu cortex-m33+nodsp + # V8 R-profile implementations. begin cpu cortex-r52 cname cortexr52 diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index ede44f497edd69390bbbe6de5a913430b546c547..a46bc3c7f8ba6048969bae4d37a7be3c5242ce6a 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -349,6 +349,9 @@ EnumValue Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33) EnumValue +Enum(processor_type) String(cortex-m33+nodsp) Value( TARGET_CPU_cortexm33nodsp) + +EnumValue Enum(processor_type) String(cortex-r52) Value( TARGET_CPU_cortexr52) Enum diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index 519c0556fe76a5a391cd268bb50541c77a4596d4..542b7972d21cd3c9986229e91ce0841522e3b52f 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -57,5 +57,5 @@ cortexa73,exynosm1,xgene1, cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35, cortexa73cortexa53,cortexm23,cortexm33, - cortexr52" + cortexm33nodsp,cortexr52" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 8f2639f722b1c6a7a3541aa030221811f565fe5e..b37a8ae475489f2f12f8d0d810ac3fb26d1eb7d3 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -26157,6 +26157,8 @@ arm_file_start (void) else if (strncmp (arm_active_target.core_name, "generic", 7) == 0) asm_fprintf (asm_out_file, "\t.arch %s\n", arm_active_target.core_name + 8); + else if (strcmp (arm_active_target.core_name, "cortex-m33+nodsp") == 0) + asm_fprintf (asm_out_file, "\t.arch armv8-m.main\n"); else { const char* truncated_name diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6f92ac552be7d909ca47f6cfd0c4b5319bf900a7..bb524b6dd87eb388e8dde0a5f33ee1aaa6a9e4e7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -15124,7 +15124,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, -@samp{cortex-m33}, +@samp{cortex-m33},@samp{cortex-m33+nodsp} @samp{cortex-m23}, @samp{cortex-m7}, @samp{cortex-m4},