@@ -6941,7 +6941,7 @@ (define_insn_and_split "*cstorecc<mode>_z13"
(match_operand 3 "const_int_operand" "")]))]
"TARGET_Z13"
"#"
- "reload_completed"
+ "&& reload_completed"
[(set (match_dup 0) (const_int 0))
(set (match_dup 0)
(if_then_else:GPR
@@ -641,7 +641,7 @@ (define_insn_and_split "fprx2_to_tf"
"@
vmrhg\t%v0,%1,%N1
#"
- "!(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))"
+ "&& !(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
{
@@ -916,7 +916,7 @@ (define_insn_and_split "tf_to_fprx2"
(subreg:FPRX2 (match_operand:TF 1 "general_operand" "v,AR") 0))]
"TARGET_VXE"
"#"
- "!(MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))"
+ "&& !(MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
{