@@ -96,21 +96,10 @@ extern unsigned int gcn_local_sym_hash (const char *name);
#define X_908 "march=gfx908:;"
#endif
-#ifdef HAVE_GCN_SRAM_ECC_FIJI
-#define S_FIJI
-#else
+/* These targets can't have SRAM-ECC, even if a broken assembler allows it. */
#define S_FIJI "!march=*:;march=fiji:;"
-#endif
-#ifdef HAVE_GCN_SRAM_ECC_GFX900
-#define S_900
-#else
#define S_900 "march=gfx900:;"
-#endif
-#ifdef HAVE_GCN_SRAM_ECC_GFX906
-#define S_906
-#else
#define S_906 "march=gfx906:;"
-#endif
#ifdef HAVE_GCN_SRAM_ECC_GFX908
#define S_908
#else
@@ -5226,27 +5226,21 @@ output_file_start (void)
#ifndef HAVE_GCN_XNACK_FIJI
use_xnack_attr = false;
#endif
-#ifndef HAVE_GCN_SRAM_ECC_FIJI
use_sram_attr = false;
-#endif
break;
case PROCESSOR_VEGA10:
cpu = "gfx900";
#ifndef HAVE_GCN_XNACK_GFX900
use_xnack_attr = false;
#endif
-#ifndef HAVE_GCN_SRAM_ECC_GFX900
use_sram_attr = false;
-#endif
break;
case PROCESSOR_VEGA20:
cpu = "gfx906";
#ifndef HAVE_GCN_XNACK_GFX906
use_xnack_attr = false;
#endif
-#ifndef HAVE_GCN_SRAM_ECC_GFX906
use_sram_attr = false;
-#endif
break;
case PROCESSOR_GFX908:
cpu = "gfx908";
@@ -42,8 +42,10 @@
#undef ELFOSABI_AMDGPU_HSA
#define ELFOSABI_AMDGPU_HSA 64
-#undef ELFABIVERSION_AMDGPU_HSA
-#define ELFABIVERSION_AMDGPU_HSA 1
+#undef ELFABIVERSION_AMDGPU_HSA_V3
+#define ELFABIVERSION_AMDGPU_HSA_V3 1
+#undef ELFABIVERSION_AMDGPU_HSA_V4
+#define ELFABIVERSION_AMDGPU_HSA_V4 2
#undef EF_AMDGPU_MACH_AMDGCN_GFX803
#define EF_AMDGPU_MACH_AMDGCN_GFX803 0x2a
@@ -77,6 +79,7 @@
#define SET_SRAM_ECC_ON(VAR) VAR |= EF_AMDGPU_SRAM_ECC_V3
#define SET_SRAM_ECC_ANY(VAR) SET_SRAM_ECC_ON (VAR)
#define SET_SRAM_ECC_OFF(VAR) VAR &= ~EF_AMDGPU_SRAM_ECC_V3
+#define SET_SRAM_ECC_UNSUPPORTED(VAR) SET_SRAM_ECC_OFF (VAR)
#define TEST_SRAM_ECC_ANY(VAR) 0 /* Not supported. */
#define TEST_SRAM_ECC_ON(VAR) (VAR & EF_AMDGPU_SRAM_ECC_V3)
#endif
@@ -94,6 +97,9 @@
| EF_AMDGPU_FEATURE_SRAMECC_ANY_V4)
#define SET_SRAM_ECC_OFF(VAR) VAR = ((VAR & ~EF_AMDGPU_FEATURE_SRAMECC_V4) \
| EF_AMDGPU_FEATURE_SRAMECC_OFF_V4)
+#define SET_SRAM_ECC_UNSUPPORTED(VAR) \
+ VAR = ((VAR & ~EF_AMDGPU_FEATURE_SRAMECC_V4) \
+ | EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4)
#define TEST_SRAM_ECC_ANY(VAR) ((VAR & EF_AMDGPU_FEATURE_SRAMECC_V4) \
== EF_AMDGPU_FEATURE_SRAMECC_ANY_V4)
#define TEST_SRAM_ECC_ON(VAR) ((VAR & EF_AMDGPU_FEATURE_SRAMECC_V4) \
@@ -346,12 +352,27 @@ copy_early_debug_info (const char *infile, const char *outfile)
/* We only support host relocations of x86_64, for now. */
gcc_assert (ehdr.e_machine == EM_X86_64);
+ /* Fiji devices use HSACOv3 regardless of the assembler. */
+ uint32_t elf_flags_actual = (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX803
+ ? 0 : elf_flags);
+ /* GFX900 devices don't support the sramecc attribute even if
+ a buggy assembler thinks it does. This must match gcn-hsa.h */
+ if (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX900)
+ SET_SRAM_ECC_UNSUPPORTED (elf_flags_actual);
+
/* Patch the correct elf architecture flag into the file. */
ehdr.e_ident[7] = ELFOSABI_AMDGPU_HSA;
- ehdr.e_ident[8] = ELFABIVERSION_AMDGPU_HSA;
+#ifdef HAVE_GCN_ASM_V3_SYNTAX
+ ehdr.e_ident[8] = ELFABIVERSION_AMDGPU_HSA_V3;
+#endif
+#ifdef HAVE_GCN_ASM_V4_SYNTAX
+ ehdr.e_ident[8] = (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX803
+ ? ELFABIVERSION_AMDGPU_HSA_V3
+ : ELFABIVERSION_AMDGPU_HSA_V4);
+#endif
ehdr.e_type = ET_REL;
ehdr.e_machine = EM_AMDGPU;
- ehdr.e_flags = elf_arch | elf_flags;
+ ehdr.e_flags = elf_arch | elf_flags_actual;
/* Load the section headers so we can walk them later. */
Elf64_Shdr *sections = (Elf64_Shdr *)xmalloc (sizeof (Elf64_Shdr)
@@ -987,13 +1008,6 @@ main (int argc, char **argv)
obstack_ptr_grow (&cc_argv_obstack, "-xlto");
if (fopenmp)
obstack_ptr_grow (&cc_argv_obstack, "-mgomp");
- obstack_ptr_grow (&cc_argv_obstack,
- (TEST_XNACK (elf_flags)
- ? "-mxnack" : "-mno-xnack"));
- obstack_ptr_grow (&cc_argv_obstack,
- (TEST_SRAM_ECC_ON (elf_flags) ? "-msram-ecc=on"
- : TEST_SRAM_ECC_ANY (elf_flags) ? "-msram-ecc=any"
- : "-msram-ecc=off"));
for (int ix = 1; ix != argc; ix++)
{