Message ID | 4a5c2985-ffab-3d06-ac02-acbbaf326869@foss.arm.com |
---|---|
State | New |
Headers | show |
Please ignore this patch. I'll respin the patch on a more recent GCC. Best regards, Thomas On 29/06/17 14:56, Thomas Preudhomme wrote: > Hi, > > This patch adds support for the ARM Cortex-R52 processor rencently > announced. > > [1] https://developer.arm.com/products/processors/cortex-r/cortex-r52 > > ChangeLog entry is as follows: > > *** gcc/ChangeLog *** > > 2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com> > > * config/arm/arm-cpus.in (cortex-r52): Add new entry. > * config/arm/arm-cpu.h: Regenerate. > * config/arm/arm-cpu-cdata.h: Regenerate. > * config/arm/arm-cpu-data.h: Regenerate. > * config/arm/arm-tables.opt: Regenerate. > * config/arm/bpabi.h (BE8_LINK_SPEC): Add entry for ARM Cortex-R52. > * config/arm/driver-arm.c (arm_cpu_table): Add entry for ARM > Cortex-R52. > * doc/invoke.texi: Mention -mtune=cortex-r52. > > Tested by building an arm-none-eabi GCC cross-compiler targeting Cortex-R52. > > Is this ok for stage1? > > Best regards, > > Thomas
diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h index 0a122f5febaaceeeb5a405cb5a64e1edd9b044f3..043b5b2db09146b5686a5fe602f907164f9d84c5 100644 --- a/gcc/config/arm/arm-cpu-cdata.h +++ b/gcc/config/arm/arm-cpu-cdata.h @@ -803,6 +803,13 @@ static const struct arm_arch_core_flag arm_arch_core_flags[] = }, }, { + "cortex-r52", + { + ISA_ARMv8r,isa_bit_crc32, + isa_nobit + }, + }, + { "armv2", { ISA_ARMv2,isa_bit_mode26, diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h index 48c1d88032c1c5dc7c6cba71511f79fe9f2533ea..0677132382fad2f1baf1fbdf5c0b03fe32f752e2 100644 --- a/gcc/config/arm/arm-cpu-data.h +++ b/gcc/config/arm/arm-cpu-data.h @@ -1132,6 +1132,16 @@ static const struct processors all_cores[] = }, &arm_v7m_tune }, + { + "cortex-r52", TARGET_CPU_cortexr52, + (TF_LDSCHED), + "8R", BASE_ARCH_8R, + { + ISA_ARMv8r,isa_bit_crc32, + isa_nobit + }, + &arm_cortex_tune + }, {NULL, TARGET_CPU_arm_none, 0, NULL, BASE_ARCH_0, {isa_nobit}, NULL} }; diff --git a/gcc/config/arm/arm-cpu.h b/gcc/config/arm/arm-cpu.h index cd282db02f56f4416ff82eb3d8d569cd99fb0d41..4d6ea61d07dc98540f0f75679d8ef6f7eafc10bb 100644 --- a/gcc/config/arm/arm-cpu.h +++ b/gcc/config/arm/arm-cpu.h @@ -132,6 +132,7 @@ enum processor_type TARGET_CPU_cortexa73cortexa53, TARGET_CPU_cortexm23, TARGET_CPU_cortexm33, + TARGET_CPU_cortexr52, TARGET_CPU_arm_none }; diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index be1f0ca4e38ae76683b77d8c3b79a066e62325d7..139aa561d3f918655978e44b5bcb6c0b50747a08 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1104,6 +1104,16 @@ begin cpu cortex-m33 costs v7m end cpu cortex-m33 + +# V8 R-profile implementations. +begin cpu cortex-r52 + cname cortexr52 + tune flags LDSCHED + architecture armv8-r+crc + costs cortex +end cpu cortex-r52 + + # FPU entries # format: # begin fpu <name> diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 7bab5de5a39e9192c97851929b83175648158cdf..ccd1a7661fb97938ddea7670eebe1a0f48efb929 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -354,6 +354,9 @@ Enum(processor_type) String(cortex-m23) Value( TARGET_CPU_cortexm23) EnumValue Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33) +EnumValue +Enum(processor_type) String(cortex-r52) Value( TARGET_CPU_cortexr52) + Enum Name(arm_arch) Type(int) Known ARM architectures (for use with the -march= option): diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index c394ac805c7577113ed72b31a06ff93dc7f5f490..c3dca1cd4833afd67e56a276ef0e9c1e17f4fae4 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -100,7 +100,7 @@ |march=armv8-m.main \ |march=armv8-m.main+dsp|mcpu=cortex-m33 \ |march-armv8-r \ - |march-armv8-r+crc \ + |march-armv8-r+crc|mcpu=cortex-r52 \ :%{!r:--be8}}}" #else #define BE8_LINK_SPEC \ @@ -142,7 +142,7 @@ |march=armv8-m.main \ |march=armv8-m.main+dsp|mcpu=cortex-m33 \ |march=armv8-r \ - |march=armv8-r+crc \ + |march=armv8-r+crc|mcpu=cortex-r52 \ :%{!r:--be8}}}" #endif diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c index 29873d57a1e45fd989f6ff01dd4a2ae7320d93bb..00f8128e6911a79f83da03bf731c1cc9127c7285 100644 --- a/gcc/config/arm/driver-arm.c +++ b/gcc/config/arm/driver-arm.c @@ -56,6 +56,7 @@ static struct vendor_cpu arm_cpu_table[] = { {"0xc15", "armv7-r", "cortex-r5"}, {"0xc17", "armv7-r", "cortex-r7"}, {"0xc18", "armv7-r", "cortex-r8"}, + {"0xd13", "armv8-r+crc", "cortex-r52"}, {"0xc20", "armv6-m", "cortex-m0"}, {"0xc21", "armv6-m", "cortex-m1"}, {"0xc23", "armv7-m", "cortex-m3"}, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 9ea580626749dc9d27bb72d56bbbef6a474a5055..a871837426485dd6a87c541386964bf85dfafde7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -15212,6 +15212,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, +@samp{cortex-r52}, @samp{cortex-m33}, @samp{cortex-m23}, @samp{cortex-m7},