Index: doc/extend.texi
===================================================================
--- doc/extend.texi	(revision 183473)
+++ doc/extend.texi	(working copy)
@@ -1244,38 +1244,38 @@ needed to locate read-only data in flash
 without using (inline) assembler code.
 
 @table @code
-@item __pgm
-@cindex @code{__pgm} AVR Named Address Spaces
-The @code{__pgm} qualifier will locate data in the
+@item __flash
+@cindex @code{__flash} AVR Named Address Spaces
+The @code{__flash} qualifier will locate data in the
 @code{.progmem.data} section. Data will be read using the @code{LPM}
 instruction. Pointers to this address space are 16 bits wide.
 
-@item __pgm1
-@item __pgm2
-@item __pgm3
-@item __pgm4
-@item __pgm5
-@cindex @code{__pgm1} AVR Named Address Spaces
-@cindex @code{__pgm2} AVR Named Address Spaces
-@cindex @code{__pgm3} AVR Named Address Spaces
-@cindex @code{__pgm4} AVR Named Address Spaces
-@cindex @code{__pgm5} AVR Named Address Spaces
+@item __flash1
+@item __flash2
+@item __flash3
+@item __flash4
+@item __flash5
+@cindex @code{__flash1} AVR Named Address Spaces
+@cindex @code{__flash2} AVR Named Address Spaces
+@cindex @code{__flash3} AVR Named Address Spaces
+@cindex @code{__flash4} AVR Named Address Spaces
+@cindex @code{__flash5} AVR Named Address Spaces
 These are 16-bit address spaces locating data in section
 @code{.progmem@var{N}.data} where @var{N} refers to
-address space @code{__pgm@var{N}}.
+address space @code{__flash@var{N}}.
 The compiler will set the @code{RAMPZ} segment register approptiately 
 before reading data by means of the @code{ELPM} instruction.
 
 On devices with less 64@tie{}kiB flash segments as indicated by the address
 space, the compiler will cut down the segment number to a number the
 device actually supports. Counting starts at@tie{}@code{0}
-for space @code{__pgm}. For example, if you access address space
-@code{__pgm3} on an ATmega128 device with two 64@tie{}kiB flash segments,
-the compiler will generate a read from @code{__pgm1}, i.e.@: it
+for space @code{__flash}. For example, if you access address space
+@code{__flash3} on an ATmega128 device with two 64@tie{}kiB flash segments,
+the compiler will generate a read from @code{__flash1}, i.e.@: it
 will load @code{RAMPZ} with@tie{}@code{1} before reading.
 
-@item __pgmx
-@cindex @code{__pgmx} AVR Named Address Spaces
+@item __memx
+@cindex @code{__memx} AVR Named Address Spaces
 This is a 24-bit address space that linearizes flash and RAM:
 If the high bit of the address is set, data is read from
 RAM using the lower two bytes as RAM address.
@@ -1288,7 +1288,7 @@ Objects in this address space will be lo
 @b{Example}
 
 @example
-char my_read (const __pgm char ** p)
+char my_read (const __flash char ** p)
 @{
     /* p is a pointer to RAM that points to a pointer to flash.
        The first indirection of p will read that flash pointer
@@ -1299,7 +1299,7 @@ char my_read (const __pgm char ** p)
 @}
 
 /* Locate array[] in flash memory */
-const __pgm int array[] = @{ 3, 5, 7, 11, 13, 17, 19 @};
+const __flash int array[] = @{ 3, 5, 7, 11, 13, 17, 19 @};
 
 int i = 1;
 
@@ -1316,8 +1316,8 @@ The purpose is to facilitate testing if
 support is available or not:
 
 @example
-#ifdef __PGM
-const __pgm int var = 1;
+#ifdef __FLASH
+const __flash int var = 1;
 
 int read_i (void)
 @{
@@ -1332,7 +1332,7 @@ int read_i (void)
 @{
     return (int) pgm_read_word (&i);
 @}
-#endif /* __PGM */
+#endif /* __FLASH */
 @end example
 
 Notice that attribute @ref{AVR Variable Attributes,@code{progmem}}
@@ -1347,13 +1347,13 @@ from @w{@uref{http://nongnu.org/avr-libc
 @itemize
 @item
 Reading across the 64@tie{}KiB section boundary of
-the @code{__pgm} or @code{__pgm@var{N}} address spaces
+the @code{__flash} or @code{__flash@var{N}} address spaces
 will show undefined behaviour. The only address space that
 supports reading across the 64@tie{}KiB flash segment boundaries is
-@code{__pgmx}.
+@code{__memx}.
 
 @item
-If you use one if the @code{__pgm@var{N}} address spaces
+If you use one if the @code{__flash@var{N}} address spaces
 you will have to arrange your linker skript to locate the
 @code{.progmem@var{N}.data} sections according to your needs.
 
@@ -1372,8 +1372,8 @@ Code like the following is not yet suppo
 support in avr-binutils,
 see @w{@uref{http://sourceware.org/PR13503,PR13503}}.
 @example
-extern const __pgmx char foo;
-const __pgmx void *pfoo = &foo;
+extern const __memx char foo;
+const __memx void *pfoo = &foo;
 @end example
 The code will throw an assembler warning and the high byte of
 @code{pfoo} will be initialized with@tie{}@code{0}, i.e.@: the
Index: config/avr/predicates.md
===================================================================
--- config/avr/predicates.md	(revision 183472)
+++ config/avr/predicates.md	(working copy)
@@ -57,17 +57,17 @@ (define_predicate "io_address_operand"
   (and (match_code "const_int")
        (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
 
-;; Return 1 if OP is a general operand not in program memory
+;; Return 1 if OP is a general operand not in flash memory
 (define_predicate "nop_general_operand"
   (and (match_operand 0 "general_operand")
-       (match_test "!avr_mem_pgm_p (op)")))
+       (match_test "!avr_mem_flash_p (op)")))
 
 ;; Return 1 if OP is an "ordinary" general operand, i.e. a general
 ;; operand whose load is not handled by a libgcc call or ELPM.
 (define_predicate "nox_general_operand"
   (and (match_operand 0 "general_operand")
        (not (match_test "avr_load_libgcc_p (op)"))
-       (not (match_test "avr_mem_pgmx_p (op)"))))
+       (not (match_test "avr_mem_memx_p (op)"))))
 
 ;; Return 1 if OP is the zero constant for MODE.
 (define_predicate "const0_operand"
Index: config/avr/avr.md
===================================================================
--- config/avr/avr.md	(revision 183472)
+++ config/avr/avr.md	(working copy)
@@ -367,7 +367,7 @@ (define_expand "load<mode>_libgcc"
     operands[3] = gen_rtx_REG (HImode, REG_Z);
     operands[2] = force_operand (XEXP (operands[1], 0), NULL_RTX);
     operands[1] = replace_equiv_address (operands[1], operands[3]);
-    set_mem_addr_space (operands[1], ADDR_SPACE_PGM);
+    set_mem_addr_space (operands[1], ADDR_SPACE_FLASH);
   })
     
 (define_insn "load_<mode>_libgcc"
@@ -391,7 +391,7 @@ (define_insn_and_split "xload8_A"
    (clobber (reg:HI REG_Z))]
   "can_create_pseudo_p()
    && !avr_xload_libgcc_p (QImode)
-   && avr_mem_pgmx_p (operands[1])
+   && avr_mem_memx_p (operands[1])
    && REG_P (XEXP (operands[1], 0))"
   { gcc_unreachable(); }
   "&& 1"
@@ -416,7 +416,7 @@ (define_insn_and_split "xload<mode>_A"
    (clobber (reg:QI 21))
    (clobber (reg:HI REG_Z))]
   "can_create_pseudo_p()
-   && avr_mem_pgmx_p (operands[1])
+   && avr_mem_memx_p (operands[1])
    && REG_P (XEXP (operands[1], 0))"
   { gcc_unreachable(); }
   "&& 1"
@@ -442,7 +442,7 @@ (define_insn_and_split "xload<mode>_A"
     DONE;
   })
 
-;; Move value from address space pgmx to a register
+;; Move value from address space memx to a register
 ;; These insns must be prior to respective generic move insn.
 
 (define_insn "xload_8"
@@ -495,7 +495,7 @@ (define_expand "mov<mode>"
     rtx dest = operands[0];
     rtx src  = operands[1]; 
     
-    if (avr_mem_pgm_p (dest))
+    if (avr_mem_flash_p (dest))
       DONE;
   
     /* One of the operands has to be in a register.  */
@@ -506,7 +506,7 @@ (define_expand "mov<mode>"
         operands[1] = src = copy_to_mode_reg (<MODE>mode, src);
       }
 
-  if (avr_mem_pgmx_p (src))
+  if (avr_mem_memx_p (src))
     {
       rtx addr = XEXP (src, 0);
 
@@ -682,7 +682,7 @@ (define_split ; "split-lpmx"
   {
      rtx addr = XEXP (operands[1], 0);
 
-     if (!avr_mem_pgm_p (operands[1])
+     if (!avr_mem_flash_p (operands[1])
          || !REG_P (addr)
          || reg_overlap_mentioned_p (addr, operands[0]))
        {
Index: config/avr/avr-protos.h
===================================================================
--- config/avr/avr-protos.h	(revision 183472)
+++ config/avr/avr-protos.h	(working copy)
@@ -120,8 +120,8 @@ extern reg_class_t avr_mode_code_base_re
 extern bool avr_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
 extern rtx avr_incoming_return_addr_rtx (void);
 extern rtx avr_legitimize_reload_address (rtx*, enum machine_mode, int, int, int, int, rtx (*)(rtx,int));
-extern bool avr_mem_pgm_p (rtx);
-extern bool avr_mem_pgmx_p (rtx);
+extern bool avr_mem_flash_p (rtx);
+extern bool avr_mem_memx_p (rtx);
 extern bool avr_load_libgcc_p (rtx);
 extern bool avr_xload_libgcc_p (enum machine_mode);
 #endif /* RTX_CODE */
Index: config/avr/avr.c
===================================================================
--- config/avr/avr.c	(revision 183472)
+++ config/avr/avr.c	(working copy)
@@ -83,13 +83,13 @@
 const avr_addrspace_t avr_addrspace[] =
 {
     { ADDR_SPACE_RAM,  0, 2, ""     ,   0 },
-    { ADDR_SPACE_PGM,  1, 2, "__pgm",   0 },
-    { ADDR_SPACE_PGM1, 1, 2, "__pgm1",  1 },
-    { ADDR_SPACE_PGM2, 1, 2, "__pgm2",  2 },
-    { ADDR_SPACE_PGM3, 1, 2, "__pgm3",  3 },
-    { ADDR_SPACE_PGM4, 1, 2, "__pgm4",  4 },
-    { ADDR_SPACE_PGM5, 1, 2, "__pgm5",  5 },
-    { ADDR_SPACE_PGMX, 1, 3, "__pgmx",  0 },
+    { ADDR_SPACE_FLASH,  1, 2, "__flash",   0 },
+    { ADDR_SPACE_FLASH1, 1, 2, "__flash1",  1 },
+    { ADDR_SPACE_FLASH2, 1, 2, "__flash2",  2 },
+    { ADDR_SPACE_FLASH3, 1, 2, "__flash3",  3 },
+    { ADDR_SPACE_FLASH4, 1, 2, "__flash4",  4 },
+    { ADDR_SPACE_FLASH5, 1, 2, "__flash5",  5 },
+    { ADDR_SPACE_MEMX, 1, 3, "__memx",  0 },
     { 0              , 0, 0, NULL,      0 }
 };
 
@@ -177,7 +177,7 @@ const struct mcu_type_s *avr_current_dev
 static GTY(()) section *progmem_swtable_section;
 
 /* Unnamed sections associated to __attribute__((progmem)) aka. PROGMEM
-   or to address space __pgm*.  */
+   or to address space __flash*.  */
 static GTY(()) section *progmem_section[6];
 
 /* Condition for insns/expanders from avr-dimode.md.  */
@@ -485,7 +485,7 @@ avr_scalar_mode_supported_p (enum machin
 /* Return TRUE if DECL is a VAR_DECL located in Flash and FALSE, otherwise.  */
 
 static bool
-avr_decl_pgm_p (tree decl)
+avr_decl_flash_p (tree decl)
 {
   if (TREE_CODE (decl) != VAR_DECL
       || TREE_TYPE (decl) == error_mark_node)
@@ -501,7 +501,7 @@ avr_decl_pgm_p (tree decl)
    address space and FALSE, otherwise.  */
  
 static bool
-avr_decl_pgmx_p (tree decl)
+avr_decl_memx_p (tree decl)
 {
   if (TREE_CODE (decl) != VAR_DECL
       || TREE_TYPE (decl) == error_mark_node)
@@ -509,14 +509,14 @@ avr_decl_pgmx_p (tree decl)
       return false;
     }
 
-  return (ADDR_SPACE_PGMX == TYPE_ADDR_SPACE (TREE_TYPE (decl)));
+  return (ADDR_SPACE_MEMX == TYPE_ADDR_SPACE (TREE_TYPE (decl)));
 }
 
 
 /* Return TRUE if X is a MEM rtx located in Flash and FALSE, otherwise.  */
 
 bool
-avr_mem_pgm_p (rtx x)
+avr_mem_flash_p (rtx x)
 {
   return (MEM_P (x)
           && !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)));
@@ -527,10 +527,10 @@ avr_mem_pgm_p (rtx x)
    address space and FALSE, otherwise.  */
 
 bool
-avr_mem_pgmx_p (rtx x)
+avr_mem_memx_p (rtx x)
 {
   return (MEM_P (x)
-          && ADDR_SPACE_PGMX == MEM_ADDR_SPACE (x));
+          && ADDR_SPACE_MEMX == MEM_ADDR_SPACE (x));
 }
 
 
@@ -2432,7 +2432,7 @@ avr_load_libgcc_p (rtx op)
         
   return (n_bytes > 2
           && !AVR_HAVE_LPMX
-          && avr_mem_pgm_p (op));
+          && avr_mem_flash_p (op));
 }
 
 /* Return true if a value of mode MODE is read by __xload_* function.  */
@@ -2802,8 +2802,8 @@ output_movqi (rtx insn, rtx operands[],
   rtx src = operands[1];
   int *real_l = l;
   
-  if (avr_mem_pgm_p (src)
-      || avr_mem_pgm_p (dest))
+  if (avr_mem_flash_p (src)
+      || avr_mem_flash_p (dest))
     {
       return avr_out_lpm (insn, operands, real_l);
     }
@@ -2853,8 +2853,8 @@ output_movhi (rtx insn, rtx xop[], int *
 
   gcc_assert (GET_MODE_SIZE (GET_MODE (dest)) == 2);
   
-  if (avr_mem_pgm_p (src)
-      || avr_mem_pgm_p (dest))
+  if (avr_mem_flash_p (src)
+      || avr_mem_flash_p (dest))
     {
       return avr_out_lpm (insn, xop, plen);
     }
@@ -3424,8 +3424,8 @@ output_movsisf (rtx insn, rtx operands[]
   rtx src = operands[1];
   int *real_l = l;
   
-  if (avr_mem_pgm_p (src)
-      || avr_mem_pgm_p (dest))
+  if (avr_mem_flash_p (src)
+      || avr_mem_flash_p (dest))
     {
       return avr_out_lpm (insn, operands, real_l);
     }
@@ -3725,8 +3725,8 @@ avr_out_movpsi (rtx insn, rtx *op, int *
   rtx dest = op[0];
   rtx src = op[1];
   
-  if (avr_mem_pgm_p (src)
-      || avr_mem_pgm_p (dest))
+  if (avr_mem_flash_p (src)
+      || avr_mem_flash_p (dest))
     {
       return avr_out_lpm (insn, op, plen);
     }
@@ -6810,10 +6810,10 @@ avr_progmem_p (tree decl, tree attribute
   if (TREE_CODE (decl) != VAR_DECL)
     return 0;
 
-  if (avr_decl_pgmx_p (decl))
+  if (avr_decl_memx_p (decl))
     return 2;
 
-  if (avr_decl_pgm_p (decl))
+  if (avr_decl_flash_p (decl))
     return 1;
 
   if (NULL_TREE
@@ -6878,8 +6878,8 @@ avr_nonconst_pointer_addrspace (tree typ
 }
 
 
-/* Sanity check NODE so that all pointers targeting address space AS1
-   go along with CONST qualifier.  Writing to this address space should
+/* Sanity check NODE so that all pointers targeting non-generic addres spaces
+   go along with CONST qualifier.  Writing to these address spaces should
    be detected and complained about as early as possible.  */
 
 static bool
@@ -7195,11 +7195,11 @@ avr_section_type_flags (tree decl, const
       addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (decl));
 
       /* Attribute progmem puts data in generic address space.
-         Set section flags as if it was in __pgm to get the right
+         Set section flags as if it was in __flash to get the right
          section prefix in the remainder.  */
 
       if (ADDR_SPACE_GENERIC_P (as))
-        as = ADDR_SPACE_PGM;
+        as = ADDR_SPACE_FLASH;
 
       flags |= as * SECTION_MACH_DEP;
       flags &= ~SECTION_WRITE;
@@ -7244,7 +7244,7 @@ avr_encode_section_info (tree decl, rtx
          patch address space.  */
       
       if (-1 == avr_progmem_p (decl, DECL_ATTRIBUTES (decl)))
-        as = ADDR_SPACE_PGM;
+        as = ADDR_SPACE_FLASH;
 
       AVR_SYMBOL_SET_ADDR_SPACE (sym, as);
     }
@@ -9469,12 +9469,12 @@ avr_addr_space_legitimate_address_p (enu
     case ADDR_SPACE_GENERIC:
       return avr_legitimate_address_p (mode, x, strict);
 
-    case ADDR_SPACE_PGM:
-    case ADDR_SPACE_PGM1:
-    case ADDR_SPACE_PGM2:
-    case ADDR_SPACE_PGM3:
-    case ADDR_SPACE_PGM4:
-    case ADDR_SPACE_PGM5:
+    case ADDR_SPACE_FLASH:
+    case ADDR_SPACE_FLASH1:
+    case ADDR_SPACE_FLASH2:
+    case ADDR_SPACE_FLASH3:
+    case ADDR_SPACE_FLASH4:
+    case ADDR_SPACE_FLASH5:
 
       switch (GET_CODE (x))
         {
@@ -9490,9 +9490,9 @@ avr_addr_space_legitimate_address_p (enu
           break;
         }
 
-      break; /* PGM */
+      break; /* FLASH */
       
-    case ADDR_SPACE_PGMX:
+    case ADDR_SPACE_MEMX:
       if (REG_P (x))
         ok = (!strict
               && can_create_pseudo_p());
@@ -9508,7 +9508,7 @@ avr_addr_space_legitimate_address_p (enu
                 && REGNO (lo) == REG_Z);
         }
       
-      break; /* PGMX */
+      break; /* MEMX */
     }
 
   if (avr_log.legitimate_address_p)
@@ -9567,8 +9567,8 @@ avr_addr_space_convert (rtx src, tree ty
 
   /* Up-casting from 16-bit to 24-bit pointer.  */
   
-  if (as_from != ADDR_SPACE_PGMX
-      && as_to == ADDR_SPACE_PGMX)
+  if (as_from != ADDR_SPACE_MEMX
+      && as_to == ADDR_SPACE_MEMX)
     {
       int msb;
       rtx sym = src;
@@ -9584,9 +9584,9 @@ avr_addr_space_convert (rtx src, tree ty
          address space.  */
 
       if (SYMBOL_REF == GET_CODE (sym)
-          && ADDR_SPACE_PGM == AVR_SYMBOL_GET_ADDR_SPACE (sym))
+          && ADDR_SPACE_FLASH == AVR_SYMBOL_GET_ADDR_SPACE (sym))
         {
-          as_from = ADDR_SPACE_PGM;
+          as_from = ADDR_SPACE_FLASH;
         }
 
       /* Linearize memory: RAM has bit 23 set.  */
@@ -9606,8 +9606,8 @@ avr_addr_space_convert (rtx src, tree ty
 
   /* Down-casting from 24-bit to 16-bit throws away the high byte.  */
 
-  if (as_from == ADDR_SPACE_PGMX
-      && as_to != ADDR_SPACE_PGMX)
+  if (as_from == ADDR_SPACE_MEMX
+      && as_to != ADDR_SPACE_MEMX)
     {
       rtx new_src = gen_reg_rtx (Pmode);
 
@@ -9651,7 +9651,7 @@ avr_emit_movmemhi (rtx *xop)
   rtx loop_reg, addr0, addr1, a_src, a_dest, insn, xas, reg_x;
   rtx a_hi8 = NULL_RTX;
 
-  if (avr_mem_pgm_p (xop[0]))
+  if (avr_mem_flash_p (xop[0]))
     return false;
 
   if (!CONST_INT_P (xop[2]))
@@ -9666,7 +9666,7 @@ avr_emit_movmemhi (rtx *xop)
 
   if (PSImode == GET_MODE (a_src))
     {
-      gcc_assert (as == ADDR_SPACE_PGMX);
+      gcc_assert (as == ADDR_SPACE_MEMX);
 
       loop_mode = (count < 0x100) ? QImode : HImode;
       loop_reg = gen_rtx_REG (loop_mode, 24);
@@ -9687,7 +9687,7 @@ avr_emit_movmemhi (rtx *xop)
         }
       else if (!ADDR_SPACE_GENERIC_P (as))
         {
-          as = ADDR_SPACE_PGM;
+          as = ADDR_SPACE_FLASH;
         }
       
       addr1 = a_src;
@@ -9718,7 +9718,7 @@ avr_emit_movmemhi (rtx *xop)
 
   gcc_assert (TMP_REGNO == LPM_REGNO);
 
-  if (as != ADDR_SPACE_PGMX)
+  if (as != ADDR_SPACE_MEMX)
     {
       /* Load instruction ([E]LPM or LD) is known at compile time:
          Do the copy-loop inline.  */
@@ -9792,7 +9792,7 @@ avr_out_movmem (rtx insn ATTRIBUTE_UNUSE
       avr_asm_len ("ld %6,%a1+", xop, plen, 1);
       break;
       
-    case ADDR_SPACE_PGM:
+    case ADDR_SPACE_FLASH:
 
       if (AVR_HAVE_LPMX)
         avr_asm_len ("lpm %6,%a1+", xop, plen, 1);
@@ -9801,11 +9801,11 @@ avr_out_movmem (rtx insn ATTRIBUTE_UNUSE
                      "adiw %1,1", xop, plen, 2);
       break;
       
-    case ADDR_SPACE_PGM1:
-    case ADDR_SPACE_PGM2:
-    case ADDR_SPACE_PGM3:
-    case ADDR_SPACE_PGM4:
-    case ADDR_SPACE_PGM5:
+    case ADDR_SPACE_FLASH1:
+    case ADDR_SPACE_FLASH2:
+    case ADDR_SPACE_FLASH3:
+    case ADDR_SPACE_FLASH4:
+    case ADDR_SPACE_FLASH5:
 
       if (AVR_HAVE_ELPMX)
         avr_asm_len ("elpm %6,%a1+", xop, plen, 1);
Index: config/avr/avr.h
===================================================================
--- config/avr/avr.h	(revision 183472)
+++ config/avr/avr.h	(working copy)
@@ -158,13 +158,13 @@ extern const avr_addrspace_t avr_addrspa
 enum
   {
     ADDR_SPACE_RAM,
-    ADDR_SPACE_PGM,
-    ADDR_SPACE_PGM1,
-    ADDR_SPACE_PGM2,
-    ADDR_SPACE_PGM3,
-    ADDR_SPACE_PGM4,
-    ADDR_SPACE_PGM5,
-    ADDR_SPACE_PGMX
+    ADDR_SPACE_FLASH,
+    ADDR_SPACE_FLASH1,
+    ADDR_SPACE_FLASH2,
+    ADDR_SPACE_FLASH3,
+    ADDR_SPACE_FLASH4,
+    ADDR_SPACE_FLASH5,
+    ADDR_SPACE_MEMX
   };
 
 #define TARGET_CPU_CPP_BUILTINS()	avr_cpu_cpp_builtins (pfile)
