From patchwork Sat Dec 17 00:30:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 131943 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 4816E1007D7 for ; Sat, 17 Dec 2011 11:31:01 +1100 (EST) Received: (qmail 28269 invoked by alias); 17 Dec 2011 00:30:59 -0000 Received: (qmail 28261 invoked by uid 22791); 17 Dec 2011 00:30:58 -0000 X-SWARE-Spam-Status: No, hits=-5.1 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 17 Dec 2011 00:30:34 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id pBH0UWHn007837 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 16 Dec 2011 19:30:32 -0500 Received: from anchor.twiddle.home (vpn-9-118.rdu.redhat.com [10.11.9.118]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id pBH0UV4O019177; Fri, 16 Dec 2011 19:30:31 -0500 Message-ID: <4EEBE2A6.9030209@redhat.com> Date: Fri, 16 Dec 2011 16:30:30 -0800 From: Richard Henderson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111115 Thunderbird/8.0 MIME-Version: 1.0 To: GCC Patches CC: Ramana Radhakrishnan , Richard Earnshaw Subject: [RFC, ARM] Split xorsi with constant after reload X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This follows the other logical patterns, andsi3 and iorsi3, which also accept reg_or_int_operand and split post-reload. For the atomic optabs, I have two choices: either rely on this post-reload splitting, or call arm_split_constant myself. Making all of the logicals work similarly seemed cleaner to me. Ok? r~ commit 55a22158e15362bda60bd89b223de9bee72cb52a Author: Richard Henderson Date: Thu Dec 15 13:34:04 2011 -0800 arm: Split xorsi with constant after reload. This puts xorsi3 in the same format as andsi3 and iorsi3. This similarity fixes code generation issues with splitting atomic_fetch_xor post-reload. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 521d6a3..0e4bc3e 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3049,13 +3049,25 @@ }" ) -(define_insn "*arm_xorsi3" - [(set (match_operand:SI 0 "s_register_operand" "=r") - (xor:SI (match_operand:SI 1 "s_register_operand" "r") - (match_operand:SI 2 "arm_rhs_operand" "rI")))] +(define_insn_and_split "*arm_xorsi3" + [(set (match_operand:SI 0 "s_register_operand" "=r,r") + (xor:SI (match_operand:SI 1 "s_register_operand" "%r,r") + (match_operand:SI 2 "reg_or_int_operand" "rI,?n")))] "TARGET_32BIT" - "eor%?\\t%0, %1, %2" - [(set_attr "predicable" "yes")] + "@ + eor%?\\t%0, %1, %2 + #" + "TARGET_32BIT + && GET_CODE (operands[2]) == CONST_INT + && !const_ok_for_arm (INTVAL (operands[2]))" + [(clobber (const_int 0))] +{ + arm_split_constant (XOR, SImode, curr_insn, + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; +} + [(set_attr "length" "4,16") + (set_attr "predicable" "yes")] ) (define_insn "*thumb1_xorsi3_insn"