[SPU] Use define_c_enum

diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md
index 426437a..5742e0d 100644
--- a/gcc/config/spu/spu.md
+++ b/gcc/config/spu/spu.md
@@ -101,58 +101,62 @@ 
 (absence_set "pipe0" "pipe1")
 
 
-(define_constants [
- (UNSPEC_BLOCKAGE	0)
- (UNSPEC_IPREFETCH	1)
- (UNSPEC_FREST		2)
- (UNSPEC_FRSQEST	3)
- (UNSPEC_FI		4)
- (UNSPEC_EXTEND_CMP	5)
- (UNSPEC_CG		6)
- (UNSPEC_CGX		7)
- (UNSPEC_ADDX		8)
- (UNSPEC_BG		9)
- (UNSPEC_BGX		10)
- (UNSPEC_SFX		11)
- (UNSPEC_FSM		12)
- (UNSPEC_HBR		13)
- (UNSPEC_LNOP		14)
- (UNSPEC_NOP		15)
- (UNSPEC_CONVERT	16)
- (UNSPEC_SELB		17)
- (UNSPEC_SHUFB		18)
- (UNSPEC_CPAT		19)
- (UNSPEC_SYNC		20)
- (UNSPEC_CNTB		21)
- (UNSPEC_SUMB		22)
- (UNSPEC_FSMB           23)
- (UNSPEC_FSMH           24)
- (UNSPEC_GBB            25)
- (UNSPEC_GBH            26)
- (UNSPEC_GB             27)
- (UNSPEC_AVGB           28)
- (UNSPEC_ABSDB          29)
- (UNSPEC_ORX            30)
- (UNSPEC_HEQ            31)
- (UNSPEC_HGT            32)
- (UNSPEC_HLGT           33)
- (UNSPEC_STOP           38)
- (UNSPEC_STOPD          39)
- (UNSPEC_SET_INTR       40)
- (UNSPEC_FSCRRD         42)
- (UNSPEC_FSCRWR         43)
- (UNSPEC_MFSPR          44)
- (UNSPEC_MTSPR          45)
- (UNSPEC_RDCH           46)
- (UNSPEC_RCHCNT         47)
- (UNSPEC_WRCH           48)
- (UNSPEC_SPU_REALIGN_LOAD 49)
- (UNSPEC_SPU_MASK_FOR_LOAD 50)
- (UNSPEC_DFTSV		 51)
- (UNSPEC_FLOAT_EXTEND	 52)
- (UNSPEC_FLOAT_TRUNCATE	 53)
- (UNSPEC_SP_SET         54)
- (UNSPEC_SP_TEST        55) 
+(define_c_enum "unspec" [
+  UNSPEC_IPREFETCH
+  UNSPEC_FREST
+  UNSPEC_FRSQEST
+  UNSPEC_FI
+  UNSPEC_EXTEND_CMP
+  UNSPEC_CG
+  UNSPEC_CGX
+  UNSPEC_ADDX
+  UNSPEC_BG
+  UNSPEC_BGX
+  UNSPEC_SFX
+  UNSPEC_FSM
+  UNSPEC_HBR
+  UNSPEC_NOP
+  UNSPEC_CONVERT
+  UNSPEC_SELB
+  UNSPEC_SHUFB
+  UNSPEC_CPAT
+  UNSPEC_CNTB
+  UNSPEC_SUMB
+  UNSPEC_FSMB
+  UNSPEC_FSMH
+  UNSPEC_GBB
+  UNSPEC_GBH
+  UNSPEC_GB
+  UNSPEC_AVGB
+  UNSPEC_ABSDB
+  UNSPEC_ORX
+  UNSPEC_HEQ
+  UNSPEC_HGT
+  UNSPEC_HLGT
+  UNSPEC_STOP
+  UNSPEC_STOPD
+  UNSPEC_SET_INTR
+  UNSPEC_FSCRRD
+  UNSPEC_FSCRWR
+  UNSPEC_MFSPR
+  UNSPEC_MTSPR
+  UNSPEC_RDCH
+  UNSPEC_RCHCNT
+  UNSPEC_WRCH
+  UNSPEC_SPU_REALIGN_LOAD
+  UNSPEC_SPU_MASK_FOR_LOAD
+  UNSPEC_DFTSV
+  UNSPEC_FLOAT_EXTEND
+  UNSPEC_FLOAT_TRUNCATE
+  UNSPEC_SP_SET
+  UNSPEC_SP_TEST
+])
+
+(define_c_enum "unspecv" [
+  UNSPECV_BLOCKAGE
+  UNSPECV_LNOP
+  UNSPECV_NOP
+  UNSPECV_SYNC
 ])
 
 (include "predicates.md")
@@ -4210,7 +4214,7 @@  selb\t%0,%4,%0,%3"
 ;; generated by the spu_expand_epilogue (taken from mips.md)
 
 (define_insn "blockage"
-  [(unspec_volatile [(const_int 0)] UNSPEC_BLOCKAGE)]
+  [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)]
   ""
   ""
   [(set_attr "type" "convert")
@@ -4392,19 +4396,19 @@  selb\t%0,%4,%0,%3"
   [(set_attr "type" "shuf")])
 
 (define_insn "nop"
-  [(unspec_volatile [(const_int 0)] UNSPEC_NOP)]
+  [(unspec_volatile [(const_int 0)] UNSPECV_NOP)]
   ""
   "nop"
   [(set_attr "type" "nop")])
 
 (define_insn "nopn"
-  [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "K")] UNSPEC_NOP)]
+  [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "K")] UNSPECV_NOP)]
   ""
   "nop\t%0"
   [(set_attr "type" "nop")])
 
 (define_insn "lnop"
-  [(unspec_volatile [(const_int 0)] UNSPEC_LNOP)]
+  [(unspec_volatile [(const_int 0)] UNSPECV_LNOP)]
   ""
   "lnop"
   [(set_attr "type" "lnop")])
@@ -4439,21 +4443,21 @@  selb\t%0,%4,%0,%3"
   [(set_attr "type" "hbr")])
 
 (define_insn "sync"
-  [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)
+  [(unspec_volatile [(const_int 0)] UNSPECV_SYNC)
    (clobber (mem:BLK (scratch)))]
   ""
   "sync"
   [(set_attr "type" "br")])
 
 (define_insn "syncc"
-  [(unspec_volatile [(const_int 1)] UNSPEC_SYNC)
+  [(unspec_volatile [(const_int 1)] UNSPECV_SYNC)
    (clobber (mem:BLK (scratch)))]
   ""
   "syncc"
   [(set_attr "type" "br")])
 
 (define_insn "dsync"
-  [(unspec_volatile [(const_int 2)] UNSPEC_SYNC)
+  [(unspec_volatile [(const_int 2)] UNSPECV_SYNC)
    (clobber (mem:BLK (scratch)))]
   ""
   "dsync"