From patchwork Fri Jul 29 11:36:33 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 107370 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 29B19B6EE8 for ; Fri, 29 Jul 2011 21:38:09 +1000 (EST) Received: (qmail 23643 invoked by alias); 29 Jul 2011 11:38:06 -0000 Received: (qmail 23618 invoked by uid 22791); 29 Jul 2011 11:38:04 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_NONE X-Spam-Check-By: sourceware.org Received: from mo-p00-ob.rzone.de (HELO mo-p00-ob.rzone.de) (81.169.146.160) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 29 Jul 2011 11:37:38 +0000 X-RZG-AUTH: :LXoWVUeid/7A29J/hMvvT2k715jHQaJercGObUOFkj18odoYNahU4Q== X-RZG-CLASS-ID: mo00 Received: from [192.168.0.22] (business-188-111-022-002.static.arcor-ip.net [188.111.22.2]) by smtp.strato.de (cohen mo33) (RZmta 26.2) with ESMTPA id c009d2n6TAdlWs ; Fri, 29 Jul 2011 13:36:39 +0200 (MEST) Message-ID: <4E329B41.9030303@gjlay.de> Date: Fri, 29 Jul 2011 13:36:33 +0200 From: Georg-Johann Lay User-Agent: Thunderbird 2.0.0.24 (X11/20100302) MIME-Version: 1.0 To: "Weddington, Eric" CC: gcc-patches@gcc.gnu.org, Anatoly Sokolov , Denis Chertykov , Richard Henderson Subject: [Committed,AVR]: Addendum to fix thinko in PR49687 References: <4E2D3821.3090007@gjlay.de> <8D64F155F1C88743BFDC71288E8E2DA8032C1E5F@csomb01.corp.atmel.com> <4E2D99CF.3050004@gjlay.de> <8D64F155F1C88743BFDC71288E8E2DA8032C2159@csomb01.corp.atmel.com> <4E3010E6.8020402@gjlay.de> In-Reply-To: <4E3010E6.8020402@gjlay.de> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02391.html (reg:DI 18) does not cover (reg:HI 26) which also contributes to the register footprint of implicit libgcc calls. I should return to elementary school and learn counting again... Installed as obvious, passed without regressions. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176923 Johann PR target/49687 * config/avr/avr.md (mulsi3, *mulsi3, mulusi3, mulssi3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3, *mulsi3): Add X to register footprint: Clobber r26/r27. Index: config/avr/avr.md =================================================================== --- config/avr/avr.md (revision 176920) +++ config/avr/avr.md (working copy) @@ -1373,6 +1373,7 @@ (define_expand "mulsi3" [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (match_operand:SI 1 "register_operand" "") (match_operand:SI 2 "nonmemory_operand" ""))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" { @@ -1395,6 +1396,7 @@ (define_insn_and_split "*mulsi3" [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (match_operand:SI 1 "pseudo_register_operand" "r") (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1431,6 +1433,7 @@ (define_insn_and_split "mulusi3" [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (zero_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1466,6 +1469,7 @@ (define_insn_and_split "mulssi3" [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (sign_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1509,6 +1513,7 @@ (define_insn_and_split "mulohisi3" (mult:SI (not:SI (zero_extend:SI (not:HI (match_operand:HI 1 "pseudo_register_operand" "r")))) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1528,6 +1533,7 @@ (define_expand "mulhisi3" [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1536,6 +1542,7 @@ (define_expand "umulhisi3" [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (zero_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1544,6 +1551,7 @@ (define_expand "usmulhisi3" [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1557,6 +1565,7 @@ (define_insn_and_split [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (any_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (any_extend2:SI (match_operand:QIHI2 2 "pseudo_register_operand" "r")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); }