From patchwork Fri Jul 1 17:41:00 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 102939 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 2947FB6F5C for ; Sat, 2 Jul 2011 03:41:29 +1000 (EST) Received: (qmail 31310 invoked by alias); 1 Jul 2011 17:41:26 -0000 Received: (qmail 31167 invoked by uid 22791); 1 Jul 2011 17:41:22 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 01 Jul 2011 17:41:08 +0000 Received: (qmail 13579 invoked from network); 1 Jul 2011 17:41:07 -0000 Received: from unknown (HELO ?84.152.209.23?) (bernds@127.0.0.2) by mail.codesourcery.com with ESMTPA; 1 Jul 2011 17:41:07 -0000 Message-ID: <4E0E06AC.3080209@codesourcery.com> Date: Fri, 01 Jul 2011 19:41:00 +0200 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110505 Lightning/1.0b3pre Thunderbird/3.1.10 MIME-Version: 1.0 To: GCC Patches Subject: [10/11] Expander fixes for 40-bit integers References: <4E0E0310.60406@codesourcery.com> In-Reply-To: <4E0E0310.60406@codesourcery.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This fixes a few random problems that occur when you add a new fractional integer mode - for example, trying to expand doubleword shifts normally for them, or trying to generate 40->64 bit widening multiply. In some cases where it seems we can only deal with modes where precision == bitsisze, I've added asserts. Bernd * optabs.c (expand_binop): Tighten conditions for doubleword expansions. (widen_bswap): Assert that mode bitsize and precision are the same. * stor-layout.c (get_best_mode): Skip modes that have lower precision than bitsize. * recog.c (simplify_while_replacing): Assert that bitsize and precision are the same. Index: gcc/optabs.c =================================================================== --- gcc/optabs.c.orig +++ gcc/optabs.c @@ -1428,12 +1428,12 @@ expand_binop (enum machine_mode mode, op takes operands of this mode and makes a wider mode. */ if (binoptab == smul_optab - && GET_MODE_WIDER_MODE (mode) != VOIDmode + && GET_MODE_2XWIDER_MODE (mode) != VOIDmode && (optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab), - GET_MODE_WIDER_MODE (mode)) + GET_MODE_2XWIDER_MODE (mode)) != CODE_FOR_nothing)) { - temp = expand_binop (GET_MODE_WIDER_MODE (mode), + temp = expand_binop (GET_MODE_2XWIDER_MODE (mode), unsignedp ? umul_widen_optab : smul_widen_optab, op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT); @@ -1575,6 +1575,7 @@ expand_binop (enum machine_mode mode, op && mclass == MODE_INT && (CONST_INT_P (op1) || optimize_insn_for_speed_p ()) && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD + && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode) && optab_handler (binoptab, word_mode) != CODE_FOR_nothing && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing) @@ -1647,7 +1648,7 @@ expand_binop (enum machine_mode mode, op if ((binoptab == rotl_optab || binoptab == rotr_optab) && mclass == MODE_INT && CONST_INT_P (op1) - && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD + && GET_MODE_PRECISION (mode) == 2 * BITS_PER_WORD && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing) { @@ -2463,6 +2464,8 @@ widen_bswap (enum machine_mode mode, rtx x = widen_operand (op0, wider_mode, mode, true, true); x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true); + gcc_assert (GET_MODE_PRECISION (wider_mode) == GET_MODE_BITSIZE (wider_mode) + && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode)); if (x != 0) x = expand_shift (RSHIFT_EXPR, wider_mode, x, GET_MODE_BITSIZE (wider_mode) Index: gcc/stor-layout.c =================================================================== --- gcc/stor-layout.c.orig +++ gcc/stor-layout.c @@ -2389,7 +2389,8 @@ get_best_mode (int bitsize, int bitpos, mode = GET_MODE_WIDER_MODE (mode)) { unit = GET_MODE_BITSIZE (mode); - if ((bitpos % unit) + bitsize <= unit) + if (unit == GET_MODE_PRECISION (mode) + && (bitpos % unit) + bitsize <= unit) break; } @@ -2414,7 +2415,8 @@ get_best_mode (int bitsize, int bitpos, tmode = GET_MODE_WIDER_MODE (tmode)) { unit = GET_MODE_BITSIZE (tmode); - if (bitpos / unit == (bitpos + bitsize - 1) / unit + if (unit == GET_MODE_PRECISION (tmode) + && bitpos / unit == (bitpos + bitsize - 1) / unit && unit <= BITS_PER_WORD && unit <= MIN (align, BIGGEST_ALIGNMENT) && (largest_mode == VOIDmode Index: gcc/recog.c =================================================================== --- gcc/recog.c.orig +++ gcc/recog.c @@ -638,6 +638,8 @@ simplify_while_replacing (rtx *loc, rtx (GET_MODE_SIZE (is_mode) - GET_MODE_SIZE (wanted_mode) - offset); + gcc_assert (GET_MODE_PRECISION (wanted_mode) + == GET_MODE_BITSIZE (wanted_mode)); pos %= GET_MODE_BITSIZE (wanted_mode); newmem = adjust_address_nv (XEXP (x, 0), wanted_mode, offset);