From patchwork Thu May 26 12:23:15 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hariharan Sandanagobalane X-Patchwork-Id: 97570 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id B5F75B6F73 for ; Thu, 26 May 2011 22:23:40 +1000 (EST) Received: (qmail 15737 invoked by alias); 26 May 2011 12:23:38 -0000 Received: (qmail 15727 invoked by uid 22791); 26 May 2011 12:23:37 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from gw-ba1.picochip.com (HELO thurne.picochip.com) (94.175.234.108) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 May 2011 12:23:19 +0000 Received: from haddeo.picochip.com ([172.17.21.76]) (authenticated bits=0) by thurne.picochip.com (8.13.8/8.13.8) with ESMTP id p4QCMxtw006644 for ; Thu, 26 May 2011 13:23:00 +0100 Message-ID: <4DDE4633.1060701@picochip.com> Date: Thu, 26 May 2011 13:23:15 +0100 From: Hari Sandanagobalane User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.7) Gecko/20100720 Fedora/3.1.1-1.fc13 Lightning/1.0b2pre Thunderbird/3.1.1 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH, picochip] cbranch pattern change Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello all, The gimple->rtl expander phase now expects cbranch to not have a :CC after the match operator. This is the case for cbranch for all the other ports anyway, so now picochip matches this pattern. Committed to mainline as ChangeLog: * config/picochip/picochip.md (cbranchhi4): No :CC for match_operator. The instruction is then expanded explicitly. (supported_compare): Callable instruction. (compare): Likewise. Patch: Attached Index: gcc/config/picochip/picochip.md =================================================================== --- gcc/config/picochip/picochip.md (revision 174269) +++ gcc/config/picochip/picochip.md (working copy) @@ -551,7 +551,7 @@ (define_insn_and_split "cbranchhi4" [(set (pc) (if_then_else - (match_operator:CC 0 "ordered_comparison_operator" + (match_operator 0 "ordered_comparison_operator" [(match_operand:HI 1 "register_operand" "r") (match_operand:HI 2 "picochip_comparison_operand" "ri")]) (label_ref (match_operand 3 "" "")) @@ -561,14 +561,15 @@ "* return picochip_output_cbranch(operands);" "reload_completed && (picochip_schedule_type != DFA_TYPE_NONE || flag_delayed_branch)" - [(set (reg:CC CC_REGNUM) (match_dup 0)) - (parallel [(set (pc) - (if_then_else (match_op_dup:HI 0 [(reg:CC CC_REGNUM) (const_int 0)]) - (label_ref (match_dup 3)) - (pc))) - (use (match_dup 4))])] + [(const_int 0)] "{ - operands[4] = GEN_INT(GET_CODE(operands[0])); + rtx const_int_opnd; + const_int_opnd = GEN_INT(GET_CODE(operands[0])); + if (picochip_supported_comparison_operator (operands[0], HImode)) + emit_insn (gen_supported_compare (operands[0], operands[1], operands[2])); + else + emit_insn (gen_compare (operands[0], operands[1], operands[2])); + emit_jump_insn (gen_branch (operands[3], const_int_opnd, operands[0])); }") ;; The only difference between this and the next pattern is that the next pattern @@ -577,7 +578,7 @@ ;; comparison operator and hence this pattern assumes that the second constraint combo ;; would still generate a normal instruction. -(define_insn "*supported_compare" +(define_insn "supported_compare" [(set (reg:CC CC_REGNUM) (match_operator:CC 0 "picochip_supported_comparison_operator" [(match_operand:HI 1 "register_operand" "r,r,r") @@ -607,7 +608,7 @@ (set_attr "length" "2,2,4") ]) -(define_insn "*compare" +(define_insn "compare" [(set (reg:CC CC_REGNUM) (match_operator:CC 0 "comparison_operator" [(match_operand:HI 1 "register_operand" "r,r,r")