From patchwork Fri Dec 24 09:45:58 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Belevantsev X-Patchwork-Id: 76628 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 9581BB70D5 for ; Fri, 24 Dec 2010 20:46:05 +1100 (EST) Received: (qmail 12047 invoked by alias); 24 Dec 2010 09:46:03 -0000 Received: (qmail 12037 invoked by uid 22791); 24 Dec 2010 09:46:02 -0000 X-SWARE-Spam-Status: No, hits=-0.7 required=5.0 tests=AWL, BAYES_00, FSL_RU_URL, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp.ispras.ru (HELO smtp.ispras.ru) (83.149.198.201) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 24 Dec 2010 09:45:55 +0000 Received: from [10.10.3.52] (winnie.ispras.ru [83.149.198.236]) by smtp.ispras.ru (Postfix) with ESMTP id 5C8D75D4148; Fri, 24 Dec 2010 12:39:13 +0300 (MSK) Message-ID: <4D146BD6.1000100@ispras.ru> Date: Fri, 24 Dec 2010 12:45:58 +0300 From: Andrey Belevantsev User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Vladimir Makarov CC: GCC Patches Subject: Re: [PATCH] Fix PR 46521 and 46522 (remnants of PR45352) References: <4CC13E91.2000800@ispras.ru> <4CD1530D.6040006@ispras.ru> <4CD46884.8010003@redhat.com> <4D10CE93.9090300@ispras.ru> <4D10E483.90205@redhat.com> In-Reply-To: <4D10E483.90205@redhat.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org > On 12/21/2010 10:58 AM, Andrey Belevantsev wrote: > >> 2010-12-21 Andrey Belevantsev >> >> PR rtl-optimization/45352 >> PR rtl-optimization/46521 >> PR rtl-optimization/46522 >> * sel-sched.c (reset_sched_cycles_in_current_ebb): Recheck the DFA state >> on the last iteration of the advancing loop. >> (sel_sched_region_1): Propagate the rescheduling bit to the next block >> also for empty blocks. Sigh, I have overlooked that we also need to recheck the state when we have reached the issue_rate limit (as we agreed on earlier this year), not only when we have a data dependency stall. So the above amendment to the patch is needed, bootstrapped and tested on x86-64 with selective scheduler enabled. Ok for trunk and branches? Andrey 2010-12-21 Andrey Belevantsev PR rtl-optimization/45352 * sel-sched.c (reset_sched_cycles_in_current_ebb): Also recheck the DFA state in the advancing loop when we have issued issue_rate insns. gcc/testsuite: 2010-12-21 Andrey Belevantsev PR rtl-optimization/45352 gcc.dg/pr45352-3.c: New. Index: testsuite/gcc.dg/pr45352-3.c =================================================================== *** testsuite/gcc.dg/pr45352-3.c (revision 0) --- testsuite/gcc.dg/pr45352-3.c (revision 0) *************** *** 0 **** --- 1,16 ---- + /* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */ + /* { dg-options "-O -fprofile-generate -fgcse -fno-gcse-lm -fgcse-sm -fno-ivopts -fno-tree-loop-im -ftree-pre -funroll-loops -fno-web -fschedule-insns2 -fselective-scheduling2 -fsel-sched-pipelining" } */ + + extern volatile float f[]; + + void foo (void) + { + int i; + for (i = 0; i < 100; i++) + f[i] = 0; + for (i = 0; i < 100; i++) + f[i] = 0; + for (i = 0; i < 100; i++) + if (f[i]) + __builtin_abort (); + } Index: sel-sched.c =================================================================== *** sel-sched.c (revision 168224) --- sel-sched.c (working copy) *************** reset_sched_cycles_in_current_ebb (void) *** 6990,6996 **** { int cost, haifa_cost; int sort_p; ! bool asm_p, real_insn, after_stall; int clock; if (!INSN_P (insn)) --- 6990,6996 ---- { int cost, haifa_cost; int sort_p; ! bool asm_p, real_insn, after_stall, all_issued; int clock; if (!INSN_P (insn)) *************** reset_sched_cycles_in_current_ebb (void) *** 7026,7033 **** haifa_cost = cost; after_stall = 1; } ! if (haifa_cost == 0 ! && issued_insns == issue_rate) haifa_cost = 1; if (haifa_cost > 0) { --- 7026,7033 ---- haifa_cost = cost; after_stall = 1; } ! all_issued = issued_insns == issue_rate; ! if (haifa_cost == 0 && all_issued) haifa_cost = 1; if (haifa_cost > 0) { *************** reset_sched_cycles_in_current_ebb (void) *** 7055,7065 **** break; /* When the data dependency stall is longer than the DFA stall, ! it could be that after the longer stall the insn will again become unavailable to the DFA restrictions. Looks strange but happens e.g. on x86-64. So recheck DFA on the last iteration. */ ! if (after_stall && real_insn && haifa_cost == 0) haifa_cost = estimate_insn_cost (insn, curr_state); --- 7055,7066 ---- break; /* When the data dependency stall is longer than the DFA stall, ! and when we have issued exactly issue_rate insns and stalled, ! it could be that after this longer stall the insn will again become unavailable to the DFA restrictions. Looks strange but happens e.g. on x86-64. So recheck DFA on the last iteration. */ ! if ((after_stall || all_issued) && real_insn && haifa_cost == 0) haifa_cost = estimate_insn_cost (insn, curr_state);