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Fri, 31 May 2024 10:27:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1717150993; s=yj20110701; d=yahoo.co.jp; h=References:Content-Transfer-Encoding:Content-Type:Subject:From:Cc:To:MIME-Version:Date:Message-ID; bh=2x2y+gVG2DPc6/naTmVONL1aYQUK7xu1EGyPTfMNiJY=; b=XLFkdA6cHw6IsskdpTYqQT31kumsNP1M7IXWwLRbFLOt+/b0OB/dpbSt50XPgrnY Pr79hiA1ySUPIG0Tn9dFWlbUMTzL+LARopvS469B+dntOmY5R1+xvcIdciRsBrzR1jT Na7XZncBqsId7P1kBUX5m/TJSGY0IZJThj9J4pDQ= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=yj20110701; d=yahoo.co.jp; h=Message-ID:Date:MIME-Version:Cc:From:Content-Type:Content-Transfer-Encoding:References; b=Nc3lagcMhLyP2wQTDFiABTWzjCRAo3xR5qZMX+ZcfpQ8XWZ9ezHZAuOe3nIoYw2j O9EneSwV7yC5NiiXRvFumi6K7JSTw+I7RI28Z65KBNUKrgDr6YlFpMBLhSElmv3RxWs FQyrOAPOKZHbCUPhFr7h7IU9SUeJgmSixutdrQoQ=; Received: by smtphe5002.mail.kks.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID 246ff831ffa9e9e05ffc06f73ce1f9d1; Fri, 31 May 2024 19:27:30 +0900 (JST) Message-ID: <414a8bdd-e4c4-4515-a179-50ee7cafd62d@yahoo.co.jp> Date: Fri, 31 May 2024 19:23:13 +0900 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: gcc-patches@gcc.gnu.org Cc: Max Filippov From: Takayuki 'January June' Suwa Subject: [PATCH 1/2] xtensa: Simplify several MD templates References: <414a8bdd-e4c4-4515-a179-50ee7cafd62d.ref@yahoo.co.jp> X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, FROM_FMBLA_NEWDOM28, GIT_PATCH_0, KAM_STOCKGEN, MEDICAL_SUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org No functional changes. gcc/ChangeLog: * config/xtensa/predicates.md (subreg_HQI_lowpart_operator, xtensa_sminmax_operator): New operator predicates. * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p): Remove. * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): Ditto. * config/xtensa/xtensa.md (*addsubx, *extzvsi-1bit_ashlsi3, *extzvsi-1bit_addsubx): Revise the output statements by conditional ternary operator rather than switch-case clause in order to avoid using gcc_unreachable(). (xtensa_clamps): Reduce to a single pattern definition using the predicate added above. (Some split patterns to assist *masktrue_const_bitcmpl): Ditto. --- gcc/config/xtensa/predicates.md | 23 +++++++ gcc/config/xtensa/xtensa-protos.h | 1 - gcc/config/xtensa/xtensa.cc | 10 --- gcc/config/xtensa/xtensa.md | 109 ++++++------------------------ 4 files changed, 43 insertions(+), 100 deletions(-) diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md index a296c7ecc99..19b9f4cd7ef 100644 --- a/gcc/config/xtensa/predicates.md +++ b/gcc/config/xtensa/predicates.md @@ -200,6 +200,29 @@ (define_predicate "xtensa_bit_join_operator" (match_code "plus,ior")) +(define_predicate "subreg_HQI_lowpart_operator" + (match_code "subreg") +{ + int ofs = SUBREG_BYTE (op), pos = 0; + switch (GET_MODE (op)) + { + case QImode: + if (BYTES_BIG_ENDIAN) + pos = 3; + break; + case HImode: + if (BYTES_BIG_ENDIAN) + pos = 2; + break; + default: + return false; + } + return ofs == pos; +}) + +(define_predicate "xtensa_sminmax_operator" + (match_code "smin,smax")) + (define_predicate "tls_symbol_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) != 0"))) diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index b87b3e8ac48..834f15e0e48 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -60,7 +60,6 @@ extern bool xtensa_tls_referenced_p (rtx); extern enum rtx_code xtensa_shlrd_which_direction (rtx, rtx); extern bool xtensa_split1_finished_p (void); extern void xtensa_split_DI_reg_imm (rtx *); -extern bool xtensa_match_CLAMPS_imms_p (rtx, rtx); #ifdef TREE_CODE extern void init_cumulative_args (CUMULATIVE_ARGS *, int); diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 84268db5c9d..301448c65e2 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -2666,16 +2666,6 @@ xtensa_emit_add_imm (rtx dst, rtx src, HOST_WIDE_INT imm, rtx scratch, } -/* Return true if the constants used in the application of smin() following - smax() meet the specifications of the CLAMPS machine instruction. */ -bool -xtensa_match_CLAMPS_imms_p (rtx cst_max, rtx cst_min) -{ - return IN_RANGE (exact_log2 (-INTVAL (cst_max)), 7, 22) - && (INTVAL (cst_max) + INTVAL (cst_min)) == -1; -} - - /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 6061a86ee13..03e816b8a12 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -180,15 +180,8 @@ "TARGET_ADDX" { operands[3] = GEN_INT (1 << INTVAL (operands[3])); - switch (GET_CODE (operands[4])) - { - case PLUS: - return "addx%3\t%0, %1, %2"; - case MINUS: - return "subx%3\t%0, %1, %2"; - default: - gcc_unreachable (); - } + return GET_CODE (operands[4]) == PLUS + ? "addx%3\t%0, %1, %2" : "subx%3\t%0, %1, %2"; } [(set_attr "type" "arith") (set_attr "mode" "SI") @@ -535,34 +528,23 @@ ;; Signed clamp. -(define_insn_and_split "*xtensa_clamps" - [(set (match_operand:SI 0 "register_operand" "=a") - (smax:SI (smin:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "const_int_operand" "i")) - (match_operand:SI 3 "const_int_operand" "i")))] - "TARGET_MINMAX && TARGET_CLAMPS - && xtensa_match_CLAMPS_imms_p (operands[3], operands[2])" - "#" - "&& 1" - [(set (match_dup 0) - (smin:SI (smax:SI (match_dup 1) - (match_dup 3)) - (match_dup 2)))] - "" - [(set_attr "type" "arith") - (set_attr "mode" "SI") - (set_attr "length" "3")]) - (define_insn "*xtensa_clamps" [(set (match_operand:SI 0 "register_operand" "=a") - (smin:SI (smax:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "const_int_operand" "i")) - (match_operand:SI 3 "const_int_operand" "i")))] + (match_operator:SI 5 "xtensa_sminmax_operator" + [(match_operator:SI 4 "xtensa_sminmax_operator" + [(match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "const_int_operand" "i")]) + (match_operand:SI 3 "const_int_operand" "i")]))] "TARGET_MINMAX && TARGET_CLAMPS - && xtensa_match_CLAMPS_imms_p (operands[2], operands[3])" + && INTVAL (operands[2]) + INTVAL (operands[3]) == -1 + && ((GET_CODE (operands[5]) == SMIN && GET_CODE (operands[4]) == SMAX + && IN_RANGE (exact_log2 (-INTVAL (operands[2])), 7, 22)) + || (GET_CODE (operands[5]) == SMAX && GET_CODE (operands[4]) == SMIN + && IN_RANGE (exact_log2 (-INTVAL (operands[3])), 7, 22)))" { static char result[64]; - sprintf (result, "clamps\t%%0, %%1, %d", floor_log2 (-INTVAL (operands[2]))); + rtx bound = operands[GET_CODE (operands[4]) == SMAX ? 2 : 3]; + sprintf (result, "clamps\t%%0, %%1, %d", floor_log2 (-INTVAL (bound))); return result; } [(set_attr "type" "arith") @@ -1101,17 +1083,7 @@ (match_dup 3)))] { int pos = INTVAL (operands[2]), shift = floor_log2 (INTVAL (operands[3])); - switch (GET_CODE (operands[4])) - { - case ASHIFT: - pos = shift - pos; - break; - case LSHIFTRT: - pos = shift + pos; - break; - default: - gcc_unreachable (); - } + pos = GET_CODE (operands[4]) == ASHIFT ? shift - pos : shift + pos; if (BITS_BIG_ENDIAN) pos = (32 - (1 + pos)) & 0x1f; operands[2] = GEN_INT (pos); @@ -1147,17 +1119,7 @@ (match_dup 2)]))] { int pos = INTVAL (operands[3]), shift = floor_log2 (INTVAL (operands[4])); - switch (GET_CODE (operands[6])) - { - case ASHIFT: - pos = shift - pos; - break; - case LSHIFTRT: - pos = shift + pos; - break; - default: - gcc_unreachable (); - } + pos = GET_CODE (operands[6]) == ASHIFT ? shift - pos : shift + pos; if (BITS_BIG_ENDIAN) pos = (32 - (1 + pos)) & 0x1f; operands[3] = GEN_INT (pos); @@ -2119,11 +2081,12 @@ (define_split [(set (pc) (if_then_else (match_operator 2 "boolean_operator" - [(subreg:HQI (not:SI (match_operand:SI 0 "register_operand")) 0) + [(match_operator 3 "subreg_HQI_lowpart_operator" + [(not:SI (match_operand:SI 0 "register_operand"))]) (const_int 0)]) (label_ref (match_operand 1 "")) (pc)))] - "!BYTES_BIG_ENDIAN" + "" [(set (pc) (if_then_else (match_op_dup 2 [(and:SI (not:SI (match_dup 0)) @@ -2132,41 +2095,9 @@ (label_ref (match_dup 1)) (pc)))] { - operands[3] = GEN_INT ((1 << GET_MODE_BITSIZE (mode)) - 1); + operands[3] = GEN_INT ((1 << GET_MODE_BITSIZE (GET_MODE (operands[3]))) - 1); }) -(define_split - [(set (pc) - (if_then_else (match_operator 2 "boolean_operator" - [(subreg:HI (not:SI (match_operand:SI 0 "register_operand")) 2) - (const_int 0)]) - (label_ref (match_operand 1 "")) - (pc)))] - "BYTES_BIG_ENDIAN" - [(set (pc) - (if_then_else (match_op_dup 2 - [(and:SI (not:SI (match_dup 0)) - (const_int 65535)) - (const_int 0)]) - (label_ref (match_dup 1)) - (pc)))]) - -(define_split - [(set (pc) - (if_then_else (match_operator 2 "boolean_operator" - [(subreg:QI (not:SI (match_operand:SI 0 "register_operand")) 3) - (const_int 0)]) - (label_ref (match_operand 1 "")) - (pc)))] - "BYTES_BIG_ENDIAN" - [(set (pc) - (if_then_else (match_op_dup 2 - [(and:SI (not:SI (match_dup 0)) - (const_int 255)) - (const_int 0)]) - (label_ref (match_dup 1)) - (pc)))]) - (define_insn_and_split "*masktrue_const_pow2_minus_one" [(set (pc) (if_then_else (match_operator 4 "boolean_operator"