diff mbox series

[arm,committed] Make ACLE builtins use arm_* namespace for expanders

Message ID 3e2fdf85-dd8b-7c52-4820-3a87d8474097@foss.arm.com
State New
Headers show
Series [arm,committed] Make ACLE builtins use arm_* namespace for expanders | expand

Commit Message

Kyrill Tkachov July 29, 2019, 3:31 p.m. UTC 
Hi all,

The builtins from <arm_acle.h> use fairly general expander names such as 
"crc", "mcr" etc.
These run the risk of being reserved by the midend in the future.
Let's namespace them to arm_* as is convention.

Bootstrapped and tested on arm-none-linux-gnueabihf.

Committing to trunk.
Thanks,
Kyrill

2019-07-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
     CODE_FOR_arm_##.
     * config/arm/arm.md (<crc_variant>): Rename to...
     (arm_<crc_variant>): ... This.
     (<cdp>): Rename to...
     (arm_<cdp>): ... This.
     (<ldc>): Rename to...
     (arm_<ldc>): ... This.
     (<stc>): Rename to...
     (arm_<stc>): ... This.
     (<mcr>): Rename to...
     (arm_<mcr>): ... This.
     (<mrc>): Rename to...
     (arm_<mrc>): ... This.
     (<mcrr>): Rename to...
     (arm_<mcrr>): ... This.
     (<mrrc>): Rename to...
     (arm_<mrrc>): ... This.
diff mbox series

Patch

diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 8f2c93743792bbf8ee9a421c408501b3a3051b2b..07da55e10a36fd50adbac9b69eb9c77c6513465f 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -376,7 +376,7 @@  static arm_builtin_datum neon_builtin_data[] =
 #undef CF
 #undef VAR1
 #define VAR1(T, N, A) \
-  {#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS},
+  {#N, UP (A), CODE_FOR_arm_##N, 0, T##_QUALIFIERS},
 
 static arm_builtin_datum acle_builtin_data[] =
 {
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f11745ba855957da4acec197f2df9c931708062a..0cc1f6e46c5ff703391403f8919279d6f71143ba 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12081,7 +12081,7 @@ 
    (set_attr "predicable" "yes")])
 
 ;; ARMv8 CRC32 instructions.
-(define_insn "<crc_variant>"
+(define_insn "arm_<crc_variant>"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
         (unspec:SI [(match_operand:SI 1 "s_register_operand" "r")
                     (match_operand:<crc_mode> 2 "s_register_operand" "r")]
@@ -12197,7 +12197,7 @@ 
   DONE;
 })
 
-(define_insn "<cdp>"
+(define_insn "arm_<cdp>"
   [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
 		     (match_operand:SI 1 "immediate_operand" "n")
 		     (match_operand:SI 2 "immediate_operand" "n")
@@ -12243,19 +12243,19 @@ 
   [(set_attr "length" "4")
    (set_attr "type" "coproc")])
 
-(define_expand "<ldc>"
+(define_expand "arm_<ldc>"
   [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
 		     (match_operand:SI 1 "immediate_operand")
 		     (mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)]
   "arm_coproc_builtin_available (VUNSPEC_<LDC>)")
 
-(define_expand "<stc>"
+(define_expand "arm_<stc>"
   [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
 		     (match_operand:SI 1 "immediate_operand")
 		     (mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)]
   "arm_coproc_builtin_available (VUNSPEC_<STC>)")
 
-(define_insn "<mcr>"
+(define_insn "arm_<mcr>"
   [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
 		     (match_operand:SI 1 "immediate_operand" "n")
 		     (match_operand:SI 2 "s_register_operand" "r")
@@ -12275,7 +12275,7 @@ 
   [(set_attr "length" "4")
    (set_attr "type" "coproc")])
 
-(define_insn "<mrc>"
+(define_insn "arm_<mrc>"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
 	(unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n")
 			  (match_operand:SI 2 "immediate_operand" "n")
@@ -12294,7 +12294,7 @@ 
   [(set_attr "length" "4")
    (set_attr "type" "coproc")])
 
-(define_insn "<mcrr>"
+(define_insn "arm_<mcrr>"
   [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
 		     (match_operand:SI 1 "immediate_operand" "n")
 		     (match_operand:DI 2 "s_register_operand" "r")
@@ -12310,7 +12310,7 @@ 
   [(set_attr "length" "4")
    (set_attr "type" "coproc")])
 
-(define_insn "<mrrc>"
+(define_insn "arm_<mrrc>"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
 	(unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n")
 			  (match_operand:SI 2 "immediate_operand" "n")