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Wed, 10 Jul 2024 08:43:36 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 428A720043; Wed, 10 Jul 2024 08:43:34 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E52AD2004F; Wed, 10 Jul 2024 08:43:32 +0000 (GMT) Received: from [9.200.158.244] (unknown [9.200.158.244]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 10 Jul 2024 08:43:32 +0000 (GMT) Message-ID: <3cd29395-c774-a5eb-4a01-331d6533f9ca@linux.ibm.com> Date: Wed, 10 Jul 2024 16:43:31 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Content-Language: en-US From: "Kewen.Lin" Subject: [PATCH] rs6000: Escalate warning to error for VSX with explicit no-altivec etc. To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BkkUGF9CD32rP2xE4nx9ioJYoz9hsNkh X-Proofpoint-ORIG-GUID: e4NkFR1zvaKP3zgbpa86hQJw1H1ig_tL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-10_04,2024-07-09_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 clxscore=1015 adultscore=0 mlxscore=0 impostorscore=0 suspectscore=0 mlxlogscore=992 phishscore=0 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407100057 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, As the discussion in PR115688, for now when users specify -mvsx and -mno-altivec explicitly, compiler emits warning rather than error, but considering both options are given explicitly, emitting hard error should be better. So this patch is to escalate some related warning to error when both are incompatible. Bootstrapped and regtested on powerpc64-linux-gnu P8/P9 and powerpc64le-linux-gnu P9 and P10. I'm going to push this next week if no objections. BR, Kewen ----- PR target/115713 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_option_override_internal): Emit error messages when explicit VSX encounters explicit soft-float, no-altivec or avoid-indexed-addresses. gcc/testsuite/ChangeLog: * gcc.target/powerpc/warn-1.c: Move to ... * gcc.target/powerpc/error-1.c: ... here. Adjust dg-warning with dg-error and remove ineffective scan. --- gcc/config/rs6000/rs6000.cc | 41 +++++++++++-------- .../powerpc/{warn-1.c => error-1.c} | 3 +- 2 files changed, 24 insertions(+), 20 deletions(-) rename gcc/testsuite/gcc.target/powerpc/{warn-1.c => error-1.c} (70%) -- 2.45.2 diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 76bbb3a28ea..3b1ee3a262a 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3822,32 +3822,37 @@ rs6000_option_override_internal (bool global_init_p) /* Add some warnings for VSX. */ if (TARGET_VSX) { - const char *msg = NULL; + bool explicit_vsx_p = rs6000_isa_flags_explicit & OPTION_MASK_VSX; if (!TARGET_HARD_FLOAT) { - if (rs6000_isa_flags_explicit & OPTION_MASK_VSX) - msg = N_("%<-mvsx%> requires hardware floating point"); - else + if (explicit_vsx_p) { - rs6000_isa_flags &= ~ OPTION_MASK_VSX; - rs6000_isa_flags_explicit |= OPTION_MASK_VSX; + if (rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT) + error ("%<-mvsx%> and %<-msoft-float%> are incompatible"); + else + warning (0, N_("%<-mvsx%> requires hardware floating-point")); } + rs6000_isa_flags &= ~OPTION_MASK_VSX; + rs6000_isa_flags_explicit |= OPTION_MASK_VSX; } else if (TARGET_AVOID_XFORM > 0) - msg = N_("%<-mvsx%> needs indexed addressing"); - else if (!TARGET_ALTIVEC && (rs6000_isa_flags_explicit - & OPTION_MASK_ALTIVEC)) - { - if (rs6000_isa_flags_explicit & OPTION_MASK_VSX) - msg = N_("%<-mvsx%> and %<-mno-altivec%> are incompatible"); + { + if (explicit_vsx_p && OPTION_SET_P (TARGET_AVOID_XFORM)) + error ("%<-mvsx%> and %<-mavoid-indexed-addresses%>" + " are incompatible"); else - msg = N_("%<-mno-altivec%> disables vsx"); - } - - if (msg) + warning (0, N_("%<-mvsx%> needs indexed addressing")); + rs6000_isa_flags &= ~OPTION_MASK_VSX; + rs6000_isa_flags_explicit |= OPTION_MASK_VSX; + } + else if (!TARGET_ALTIVEC + && (rs6000_isa_flags_explicit & OPTION_MASK_ALTIVEC)) { - warning (0, msg); - rs6000_isa_flags &= ~ OPTION_MASK_VSX; + if (explicit_vsx_p) + error ("%<-mvsx%> and %<-mno-altivec%> are incompatible"); + else + warning (0, N_("%<-mno-altivec%> disables vsx")); + rs6000_isa_flags &= ~OPTION_MASK_VSX; rs6000_isa_flags_explicit |= OPTION_MASK_VSX; } } diff --git a/gcc/testsuite/gcc.target/powerpc/warn-1.c b/gcc/testsuite/gcc.target/powerpc/error-1.c similarity index 70% rename from gcc/testsuite/gcc.target/powerpc/warn-1.c rename to gcc/testsuite/gcc.target/powerpc/error-1.c index 76ac0c4e26e..d38eba8bb8a 100644 --- a/gcc/testsuite/gcc.target/powerpc/warn-1.c +++ b/gcc/testsuite/gcc.target/powerpc/error-1.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-O -mvsx -mno-altivec" } */ -/* { dg-warning "'-mvsx' and '-mno-altivec' are incompatible" "" { target *-*-* } 0 } */ +/* { dg-error "'-mvsx' and '-mno-altivec' are incompatible" "" { target *-*-* } 0 } */ double foo (double *x, double *y) @@ -16,4 +16,3 @@ foo (double *x, double *y) return z[0] * z[1]; } -/* { dg-final { scan-assembler-not "xsadddp" } } */