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Thu, 22 Aug 2024 15:24:13 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DBA1958059; Thu, 22 Aug 2024 15:24:10 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E18C658057; Thu, 22 Aug 2024 15:24:09 +0000 (GMT) Received: from [9.67.89.107] (unknown [9.67.89.107]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTP; Thu, 22 Aug 2024 15:24:09 +0000 (GMT) Message-ID: <38412c71-27be-4868-bfed-1ac5796e65ad@linux.ibm.com> Date: Thu, 22 Aug 2024 08:24:09 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: GCC Patches , Kewen , segher , Peter Bergner , David Edelsohn , cel From: Carl Love Subject: [PATCH ver 3] rs6000,extend and document built-ins vec_test_lsbb_all_ones and vec_test_lsbb_all_zeros X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 6JGFVGrf5WU0gPthyXdGPwuX6bPtexT- X-Proofpoint-ORIG-GUID: FUIjG3OrxL7TxhMo9RgreVHiuE1Wjf7U X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-22_08,2024-08-22_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 bulkscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408220113 X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SCC_10_SHORT_WORD_LINES, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Gcc maintainers: Version 3, fixed a few typos per Kewen's review.  Fixed the expected number of scan-assembler-times for xvtlsbb and setbc.  Retested on Power 10 LE. Version 2, based on discussion additional overloaded instances of the vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins has been added.  The additional instances are for arguments of vector signed char and vector bool char.  The patch has been tested on Power 10 LE and BE with no regressions. Per a report from a user, the existing vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins are not documented in the GCC documentation file. The following patch adds missing documentation for the vec_test_lsbb_all_ones and, vec_test_lsbb_all_zeros built-ins. Please let me know if the patch is acceptable for mainline.  Thanks.                           Carl ---------------------------------------------------------------------------- rs6000,extend and document built-ins vec_test_lsbb_all_ones  and vec_test_lsbb_all_zeros The built-ins currently support vector unsigned char arguments. Extend the built-ins to also support vector signed char and vector bool char arguments. Add documentation for the Power 10 built-ins vec_test_lsbb_all_ones and vec_test_lsbb_all_zeros.  The vec_test_lsbb_all_ones built-in returns 1 if the least significant bit in each byte is a 1, returns 0 otherwise.  Similarly, vec_test_lsbb_all_zeros returns a 1 if the least significant bit in each byte is a zero and 0 otherwise. Add addtional test cases for the built-ins in files:   gcc/testsuite/gcc.target/powerpc/lsbb.c   gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c gcc/ChangeLog:     * config/rs6000/rs6000-overloaded.def (vec_test_lsbb_all_ones,     vec_test_lsbb_all_zeros): Add built-in instances for vector signed     char and vector bool char.     * doc/extend.texi (vec_test_lsbb_all_ones,     vec_test_lsbb_all_zeros): Add documentation for the     existing built-ins. gcc/testsuite/ChangeLog:gcc/testsuite/ChangeLog:     * gcc.target/powerpc/lsbb-runnable.c: Add test cases for the vector     signed char and vector bool char instances of     vec_test_lsbb_all_zeros and vec_test_lsbb_all_ones built-ins.     * gcc.target/powerpc/lsbb.c: Add compile test cases for the vector     signed char and vector bool char instances of     vec_test_lsbb_all_zeros and vec_test_lsbb_all_ones built-ins. ---  gcc/config/rs6000/rs6000-overload.def         |  12 +-  gcc/doc/extend.texi                           |  19 +++  .../gcc.target/powerpc/lsbb-runnable.c        | 131 ++++++++++++++----  gcc/testsuite/gcc.target/powerpc/lsbb.c       |  28 +++-  4 files changed, 158 insertions(+), 32 deletions(-) diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 87495aded49..7d9e31c3f9e 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4403,12 +4403,20 @@      XXEVAL  XXEVAL_VUQ  [VEC_TEST_LSBB_ALL_ONES, vec_test_lsbb_all_ones, __builtin_vec_xvtlsbb_all_ones] +  signed int __builtin_vec_xvtlsbb_all_ones (vsc); +    XVTLSBB_ONES LSBB_ALL_ONES_VSC    signed int __builtin_vec_xvtlsbb_all_ones (vuc); -    XVTLSBB_ONES +    XVTLSBB_ONES LSBB_ALL_ONES_VUC +  signed int __builtin_vec_xvtlsbb_all_ones (vbc); +    XVTLSBB_ONES LSBB_ALL_ONES_VBC  [VEC_TEST_LSBB_ALL_ZEROS, vec_test_lsbb_all_zeros, __builtin_vec_xvtlsbb_all_zeros] +  signed int __builtin_vec_xvtlsbb_all_zeros (vsc); +    XVTLSBB_ZEROS LSBB_ALL_ZEROS_VSC    signed int __builtin_vec_xvtlsbb_all_zeros (vuc); -    XVTLSBB_ZEROS +    XVTLSBB_ZEROS LSBB_ALL_ZEROS_VUC +  signed int __builtin_vec_xvtlsbb_all_zeros (vbc); +    XVTLSBB_ZEROS LSBB_ALL_ZEROS_VBC  [VEC_TRUNC, vec_trunc, __builtin_vec_trunc]    vf __builtin_vec_trunc (vf); diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 89fe5db7aed..8971d9fbf3c 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -23332,6 +23332,25 @@ signed long long will sign extend the rightmost byte of each doubleword.  The following additional built-in functions are also available for the  PowerPC family of processors, starting with ISA 3.1 (@option{-mcpu=power10}): +@smallexample +@exdent int vec_test_lsbb_all_ones (vector signed char); +@exdent int vec_test_lsbb_all_ones (vector unsigned char); +@exdent int vec_test_lsbb_all_ones (vector bool char); +@end smallexample +@findex vec_test_lsbb_all_ones + +The builtin @code{vec_test_lsbb_all_ones} returns 1 if the least significant +bit in each byte is equal to 1.  It returns 0 otherwise. + +@smallexample +@exdent int vec_test_lsbb_all_zeros (vector signed char); +@exdent int vec_test_lsbb_all_zeros (vector unsigned char); +@exdent int vec_test_lsbb_all_zeros (vector bool char); +@end smallexample +@findex vec_test_lsbb_all_zeros + +The builtin @code{vec_test_lsbb_all_zeros} returns 1 if the least significant +bit in each byte is equal to zero.  It returns 0 otherwise.  @smallexample  @exdent vector unsigned long long int diff --git a/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c b/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c index 2e97cc17b60..3e4f71bed12 100644 --- a/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c @@ -17,7 +17,27 @@  void abort (void);  #define ITERS 7 -vector char input_vec[ITERS] = { +vector signed char input_svec[ITERS] = { +  {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +  {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, +  {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1}, +  {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, +  {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, +  {0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe}, +  {0xfe, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9} +}; + +vector unsigned char input_uvec[ITERS] = { +  {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +  {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, +  {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1}, +  {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}, +  {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, +  {0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe}, +  {0xfe, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9} +}; + +vector bool char input_bvec[ITERS] = {    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},    {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},    {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1}, @@ -30,37 +50,100 @@ vector char input_vec[ITERS] = {  int expected_allzeros_results[ITERS] = {1, 0, 0, 0, 0, 1, 0};  int expected_allones_results[ITERS] =  {0, 1, 0, 0, 1, 0, 0}; -int test_for_zeros(vector char vc) { -  return vec_test_lsbb_all_zeros(vc); +int test_for_zeros_uc(vector unsigned char vuc) { +  return vec_test_lsbb_all_zeros(vuc); +} + +int test_for_zeros_sc(vector signed char vsc) { +  return vec_test_lsbb_all_zeros(vsc); +} + +int test_for_zeros_bc(vector bool char vbc) { +  return vec_test_lsbb_all_zeros(vbc); +} + +int test_for_ones_sc(vector signed char vsc) { +  return vec_test_lsbb_all_ones(vsc); +} + +int test_for_ones_uc(vector unsigned char vuc) { +  return vec_test_lsbb_all_ones(vuc);  } -int test_for_ones(vector char vc) { -  return vec_test_lsbb_all_ones(vc); +int test_for_ones_bc(vector bool char vbc) { +  return vec_test_lsbb_all_ones(vbc);  }  int main ()  { -int allzeros,allones; -int iter; -int failcount=0; -vector char srcvec; - -for (iter=0;iter -int test_for_zeros(vector char vc) { +int test_for_zeros_signed(vector char vc) {    return vec_test_lsbb_all_zeros(vc);  } -int test_for_ones(vector char vc) { +int test_for_zeros_unsigned(vector unsigned char vuc) { +  return vec_test_lsbb_all_zeros(vuc); +} + +int test_for_zeros_bool(vector bool char vbc) { +  return vec_test_lsbb_all_zeros(vbc); +} + +int test_for_ones_signed(vector signed char vc) {    return vec_test_lsbb_all_ones(vc);  } +int test_for_ones_unsigned(vector unsigned char vuc) { +  return vec_test_lsbb_all_ones(vuc); +} + +int test_for_ones_bool(vector bool char vbc) { +  return vec_test_lsbb_all_ones(vbc); +} +