From patchwork Tue Nov 7 08:19:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 835147 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-466105-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="vRP85QW0"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yWMn659znz9t3Z for ; Tue, 7 Nov 2017 19:20:16 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=Z3KPikQ/gaxt3sRxhX+Iy/BKHq6uYqrrM9YzKiW7PbZMsFVu9A E1KHNQD47QBiBuwLEVT+4cevjLUqkxmJ5MeOp1IbCjtPCVr9Bmc/fGCsmlddDDZk 8saKQFrL6IBZ4XfXxTulvT7g5CUD5TsfZWznFR6f10C7EF8aRkRtapcHA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; s= default; bh=GsBK8JLdRzQP6dm1HQ/M3NNKcX4=; b=vRP85QW0TVKP8N2DewKW 4aJkxrecc1fBep59K9BUPy8ZVheGP6hGsdE6i+D07iiIA0TueTxPE0swBHHwqSEq E5bEk9MKezHgNYXv5u13BFydS5bJAiFXRH/B45XZQbpnsx/6S/Byy0Ucf0nN5UA+ vYQKN5ma0aewrnaU2Jn4JUw= Received: (qmail 106718 invoked by alias); 7 Nov 2017 08:20:07 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 104869 invoked by uid 89); 7 Nov 2017 08:20:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS, URIBL_RED autolearn=ham version=3.3.2 spammy= X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 07 Nov 2017 08:20:05 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-MBX-04.mgc.mentorg.com) by relay1.mentorg.com with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) id 1eBz75-0000VN-Hb from Tom_deVries@mentor.com ; Tue, 07 Nov 2017 00:20:03 -0800 Received: from [137.202.13.177] (137.202.0.87) by SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Tue, 7 Nov 2017 08:20:00 +0000 To: GCC Patches CC: From: Tom de Vries Subject: [arm, committed] Remove semicolon after while {} do (0) in HANDLE_NARROW_SHIFT_ARITH Message-ID: <2a8c2f15-29e1-e58b-970e-2d0a6bfa7a06@mentor.com> Date: Tue, 7 Nov 2017 09:19:59 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 X-ClientProxiedBy: svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) To SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) Hi, this patch removes a semicolon after "while {} do (0)" in HANDLE_NARROW_SHIFT_ARITH. This allows the macro to be used in if-then-elses without curly braces. Build arm compiler. Committed as obvious. Thanks, - Tom [arm] Remove semicolon after while {} do (0) in HANDLE_NARROW_SHIFT_ARITH 2017-11-06 Tom de Vries PR other/82784 * config/arm/arm.c (HANDLE_NARROW_SHIFT_ARITH): Remove semicolon after "while {} do (0)". (arm_rtx_costs_internal): Add missing semicolon after HANDLE_NARROW_SHIFT_ARITH call. --- gcc/config/arm/arm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 033ec25..c2a3e9c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -9222,7 +9222,7 @@ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost) return true; \ } \ } \ - while (0); + while (0) /* RTX costs. Make an estimate of the cost of executing the operation X, which is contained with an operation with code OUTER_CODE. @@ -9654,8 +9654,8 @@ arm_rtx_costs_internal (rtx x, enum rtx_code code, enum rtx_code outer_code, /* We check both sides of the MINUS for shifter operands since, unlike PLUS, it's not commutative. */ - HANDLE_NARROW_SHIFT_ARITH (MINUS, 0) - HANDLE_NARROW_SHIFT_ARITH (MINUS, 1) + HANDLE_NARROW_SHIFT_ARITH (MINUS, 0); + HANDLE_NARROW_SHIFT_ARITH (MINUS, 1); /* Slightly disparage, as we might need to widen the result. */ *cost += 1; @@ -9766,7 +9766,7 @@ arm_rtx_costs_internal (rtx x, enum rtx_code code, enum rtx_code outer_code, rtx shift_op, shift_reg; shift_reg = NULL; - HANDLE_NARROW_SHIFT_ARITH (PLUS, 0) + HANDLE_NARROW_SHIFT_ARITH (PLUS, 0); if (CONST_INT_P (XEXP (x, 1))) {