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[23.233.12.249]) by smtp.gmail.com with ESMTPSA id op54-20020a05620a537600b007742c6823a3sm600611qkn.108.2023.10.31.08.47.01 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Oct 2023 08:47:01 -0700 (PDT) Message-ID: <27a79c6e-d19f-b6d5-e4ad-b139860cd255@redhat.com> Date: Tue, 31 Oct 2023 11:47:00 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 To: "gcc-patches@gcc.gnu.org" From: Vladimir Makarov Subject: [pushed][PR111917][RA]: Fixing LRA cycling for multi-reg variable containing a fixed reg X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111971 Successfully bootstrapped and tested on x86-64, aarch64, pp64le. commit df111406b4ea1fe2890e94d51655e571cf260d29 Author: Vladimir N. Makarov Date: Tue Oct 31 10:54:43 2023 -0400 [RA]: Fixing LRA cycling for multi-reg variable containing a fixed reg PR111971 test case uses a multi-reg variable containing a fixed reg. LRA rejects such multi-reg because of this when matching the constraint for an asm insn. The rejection results in LRA cycling. The patch fixes this issue. gcc/ChangeLog: PR rtl-optimization/111971 * lra-constraints.cc: (process_alt_operands): Don't check start hard regs for regs originated from register variables. gcc/testsuite/ChangeLog: PR rtl-optimization/111971 * gcc.target/powerpc/pr111971.c: New test. diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index d10a2a3dc51..0607c8be7cb 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -2609,12 +2609,15 @@ process_alt_operands (int only_alternative) winreg = true; if (REG_P (op)) { + tree decl; if (hard_regno[nop] >= 0 && in_hard_reg_set_p (this_alternative_set, mode, hard_regno[nop]) - && !TEST_HARD_REG_BIT - (this_alternative_exclude_start_hard_regs, - hard_regno[nop])) + && ((REG_ATTRS (op) && (decl = REG_EXPR (op)) != NULL + && VAR_P (decl) && DECL_HARD_REGISTER (decl)) + || !(TEST_HARD_REG_BIT + (this_alternative_exclude_start_hard_regs, + hard_regno[nop])))) win = true; else if (hard_regno[nop] < 0 && in_class_p (op, this_alternative, NULL)) diff --git a/gcc/testsuite/gcc.target/powerpc/pr111971.c b/gcc/testsuite/gcc.target/powerpc/pr111971.c new file mode 100644 index 00000000000..7f058bd4820 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr111971.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +void +foo (unsigned long long *a) +{ + register long long d asm ("r0") = 0x24; + long long n; + asm ("mr %0, %1" : "=r"(n) : "r"(d)); + *a++ = n; +}