diff mbox series

[aarch64] PR target/91386 Use copy_rtx to avoid modifying original insns in peep2 pattern

Message ID 25840eb1-d3d8-ff94-9cbb-eb44b3b4c363@arm.com
State New
Headers show
Series [aarch64] PR target/91386 Use copy_rtx to avoid modifying original insns in peep2 pattern | expand

Commit Message

Richard Earnshaw (lists) Aug. 9, 2019, 4:15 p.m. UTC
PR target/91386 is a situation where a peephole2 pattern substitution
is discarded late because the selected instructions contain
frame-related notes that we cannot redistribute (because the pattern
has more than one insn in the output).  Unfortunately, the original
insns were being modified during the generation, so after the undo we
are left with corrupt RTL.

We avoid this by ensuring that the modifications are always made on a
copy, so that the original insns are never changed.

	PR target/91386
	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx
	to preserve the contents of the original insns.

Committed to trunk.

Comments

Richard Earnshaw (lists) Aug. 19, 2019, 4:12 p.m. UTC | #1
On 09/08/2019 17:15, Richard Earnshaw (lists) wrote:
> PR target/91386 is a situation where a peephole2 pattern substitution
> is discarded late because the selected instructions contain
> frame-related notes that we cannot redistribute (because the pattern
> has more than one insn in the output).  Unfortunately, the original
> insns were being modified during the generation, so after the undo we
> are left with corrupt RTL.
> 
> We avoid this by ensuring that the modifications are always made on a
> copy, so that the original insns are never changed.
> 
>      PR target/91386
>      * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx
>      to preserve the contents of the original insns.
> 
> Committed to trunk.

And now backported to gcc-9.

R.
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 5bf182ccc0c..fdeca927153 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -18546,19 +18546,21 @@  aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
   /* Sort the operands.  */
   qsort (temp_operands, 4, 2 * sizeof (rtx *), aarch64_ldrstr_offset_compare);
 
+  /* Copy the memory operands so that if we have to bail for some
+     reason the original addresses are unchanged.  */
   if (load)
     {
-      mem_1 = temp_operands[1];
-      mem_2 = temp_operands[3];
-      mem_3 = temp_operands[5];
-      mem_4 = temp_operands[7];
+      mem_1 = copy_rtx (temp_operands[1]);
+      mem_2 = copy_rtx (temp_operands[3]);
+      mem_3 = copy_rtx (temp_operands[5]);
+      mem_4 = copy_rtx (temp_operands[7]);
     }
   else
     {
-      mem_1 = temp_operands[0];
-      mem_2 = temp_operands[2];
-      mem_3 = temp_operands[4];
-      mem_4 = temp_operands[6];
+      mem_1 = copy_rtx (temp_operands[0]);
+      mem_2 = copy_rtx (temp_operands[2]);
+      mem_3 = copy_rtx (temp_operands[4]);
+      mem_4 = copy_rtx (temp_operands[6]);
       gcc_assert (code == UNKNOWN);
     }